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| author | Laurent Vivier <laurent@vivier.eu> | 2018-01-04 02:29:07 +0100 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2018-01-04 17:24:35 +0100 |
| commit | 0bdb2b3bf5660f892ddbfa09baea56cdca57ad1d (patch) | |
| tree | 20429d0f28ad8f2e23d90d1cb90705cd329c0c4f /target/m68k/translate.c | |
| parent | f58ed1c50add3e76331afdc92387c0da9dd9e443 (diff) | |
| download | qemu-0bdb2b3bf5660f892ddbfa09baea56cdca57ad1d.zip qemu-0bdb2b3bf5660f892ddbfa09baea56cdca57ad1d.tar.gz qemu-0bdb2b3bf5660f892ddbfa09baea56cdca57ad1d.tar.bz2 | |
target/m68k: add reset
The instruction traps if the CPU is not in
Supervisor state but the helper is empty because
there is no easy way to reset all the peripherals
without resetting the CPU itself.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20180104012913.30763-12-laurent@vivier.eu>
Diffstat (limited to 'target/m68k/translate.c')
| -rw-r--r-- | target/m68k/translate.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 98efe6b..e8f7d07 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -2762,6 +2762,18 @@ DISAS_INSN(unlk) tcg_temp_free(src); } +#if defined(CONFIG_SOFTMMU) +DISAS_INSN(reset) +{ + if (IS_USER(s)) { + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); + return; + } + + gen_helper_reset(cpu_env); +} +#endif + DISAS_INSN(nop) { } @@ -5572,6 +5584,7 @@ void register_m68k_insns (CPUM68KState *env) #if defined(CONFIG_SOFTMMU) INSN(move_to_usp, 4e60, fff8, USP); INSN(move_from_usp, 4e68, fff8, USP); + INSN(reset, 4e70, ffff, M68000); BASE(stop, 4e72, ffff); BASE(rte, 4e73, ffff); INSN(movec, 4e7b, ffff, CF_ISA_A); |