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| author | Song Gao <gaosong@loongson.cn> | 2022-11-01 11:17:15 +0800 |
|---|---|---|
| committer | Song Gao <gaosong@loongson.cn> | 2022-11-04 17:09:50 +0800 |
| commit | a6b129c8102668717370ec27490523fb1290ae5d (patch) | |
| tree | 50ddd3326656fc9699c3da686818ed2ef0b8024c /target/loongarch/cpu.c | |
| parent | 3dfbb6dee57f48abdc5b51edfd4dd57869d838df (diff) | |
| download | qemu-a6b129c8102668717370ec27490523fb1290ae5d.zip qemu-a6b129c8102668717370ec27490523fb1290ae5d.tar.gz qemu-a6b129c8102668717370ec27490523fb1290ae5d.tar.bz2 | |
target/loongarch: Add exception subcode
We need subcodes to distinguish the same excode cs->exception_indexs,
such as EXCCODE_ADEF/EXCCODE_ADEM.
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20221101073210.3934280-1-gaosong@loongson.cn>
Diffstat (limited to 'target/loongarch/cpu.c')
| -rw-r--r-- | target/loongarch/cpu.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 49393d9..b28aaed 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -220,7 +220,10 @@ static void loongarch_cpu_do_interrupt(CPUState *cs) env->CSR_TLBRERA = FIELD_DP64(env->CSR_TLBRERA, CSR_TLBRERA, PC, (env->pc >> 2)); } else { - env->CSR_ESTAT = FIELD_DP64(env->CSR_ESTAT, CSR_ESTAT, ECODE, cause); + env->CSR_ESTAT = FIELD_DP64(env->CSR_ESTAT, CSR_ESTAT, ECODE, + EXCODE_MCODE(cause)); + env->CSR_ESTAT = FIELD_DP64(env->CSR_ESTAT, CSR_ESTAT, ESUBCODE, + EXCODE_SUBCODE(cause)); env->CSR_PRMD = FIELD_DP64(env->CSR_PRMD, CSR_PRMD, PPLV, FIELD_EX64(env->CSR_CRMD, CSR_CRMD, PLV)); env->CSR_PRMD = FIELD_DP64(env->CSR_PRMD, CSR_PRMD, PIE, @@ -257,7 +260,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs) env->pc = env->CSR_TLBRENTRY; } else { env->pc = env->CSR_EENTRY; - env->pc += cause * vec_size; + env->pc += EXCODE_MCODE(cause) * vec_size; } qemu_log_mask(CPU_LOG_INT, "%s: PC " TARGET_FMT_lx " ERA " TARGET_FMT_lx |