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| author | Lei Wang <lei4.wang@intel.com> | 2023-07-06 13:49:48 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-07-07 12:52:27 +0200 |
| commit | 3baf7ae63505eb1652d1e52d65798307fead8539 (patch) | |
| tree | 49f731a2daba2de499d758105b35aff2ff60ca24 /target/i386 | |
| parent | 6c43ec3b206956a8a3008accafe9eb2dfd885190 (diff) | |
| download | qemu-3baf7ae63505eb1652d1e52d65798307fead8539.zip qemu-3baf7ae63505eb1652d1e52d65798307fead8539.tar.gz qemu-3baf7ae63505eb1652d1e52d65798307fead8539.tar.bz2 | |
target/i386: Add few security fix bits in ARCH_CAPABILITIES into SapphireRapids CPU model
SapphireRapids has bit 13, 14 and 15 of MSR_IA32_ARCH_CAPABILITIES
enabled, which are related to some security fixes.
Add version 2 of SapphireRapids CPU model with those bits enabled also.
Signed-off-by: Lei Wang <lei4.wang@intel.com>
Signed-off-by: Tao Su <tao1.su@linux.intel.com>
Message-ID: <20230706054949.66556-6-tao1.su@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386')
| -rw-r--r-- | target/i386/cpu.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 852c45b..ec22907 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3944,8 +3944,17 @@ static const X86CPUDefinition builtin_x86_defs[] = { .model_id = "Intel Xeon Processor (SapphireRapids)", .versions = (X86CPUVersionDefinition[]) { { .version = 1 }, - { /* end of list */ }, - }, + { + .version = 2, + .props = (PropValue[]) { + { "sbdr-ssdp-no", "on" }, + { "fbsdp-no", "on" }, + { "psdp-no", "on" }, + { /* end of list */ } + } + }, + { /* end of list */ } + } }, { .name = "Denverton", |