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author | Maxim Levitsky <mlevitsk@redhat.com> | 2021-11-01 15:23:00 +0200 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-11-02 15:57:27 +0100 |
commit | cabf9862e42ffeab9de9b1bfa12cddaf125c53e8 (patch) | |
tree | 3482c587ed922db9a72dd5e8281e840dda5875e0 /target/i386/kvm | |
parent | 6aedeb650e6978ee8165f05b79fbfab6ed486eff (diff) | |
download | qemu-cabf9862e42ffeab9de9b1bfa12cddaf125c53e8.zip qemu-cabf9862e42ffeab9de9b1bfa12cddaf125c53e8.tar.gz qemu-cabf9862e42ffeab9de9b1bfa12cddaf125c53e8.tar.bz2 |
KVM: SVM: add migration support for nested TSC scaling
Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20211101132300.192584-4-mlevitsk@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/kvm')
-rw-r--r-- | target/i386/kvm/kvm.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 0eb7a03..5a698bd 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -105,6 +105,7 @@ static bool has_msr_hv_reenlightenment; static bool has_msr_xss; static bool has_msr_umwait; static bool has_msr_spec_ctrl; +static bool has_tsc_scale_msr; static bool has_msr_tsx_ctrl; static bool has_msr_virt_ssbd; static bool has_msr_smi_count; @@ -2216,6 +2217,9 @@ static int kvm_get_supported_msrs(KVMState *s) case MSR_IA32_SPEC_CTRL: has_msr_spec_ctrl = true; break; + case MSR_AMD64_TSC_RATIO: + has_tsc_scale_msr = true; + break; case MSR_IA32_TSX_CTRL: has_msr_tsx_ctrl = true; break; @@ -2972,6 +2976,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level) if (has_msr_spec_ctrl) { kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, env->spec_ctrl); } + if (has_tsc_scale_msr) { + kvm_msr_entry_add(cpu, MSR_AMD64_TSC_RATIO, env->amd_tsc_scale_msr); + } + if (has_msr_tsx_ctrl) { kvm_msr_entry_add(cpu, MSR_IA32_TSX_CTRL, env->tsx_ctrl); } @@ -3377,6 +3385,10 @@ static int kvm_get_msrs(X86CPU *cpu) if (has_msr_spec_ctrl) { kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, 0); } + if (has_tsc_scale_msr) { + kvm_msr_entry_add(cpu, MSR_AMD64_TSC_RATIO, 0); + } + if (has_msr_tsx_ctrl) { kvm_msr_entry_add(cpu, MSR_IA32_TSX_CTRL, 0); } @@ -3788,6 +3800,9 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_IA32_SPEC_CTRL: env->spec_ctrl = msrs[i].data; break; + case MSR_AMD64_TSC_RATIO: + env->amd_tsc_scale_msr = msrs[i].data; + break; case MSR_IA32_TSX_CTRL: env->tsx_ctrl = msrs[i].data; break; |