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| author | Claudio Fontana <cfontana@suse.de> | 2021-03-22 14:27:43 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-05-10 15:41:50 -0400 |
| commit | ce21726525da53053432b19e27e9fd2a49086d78 (patch) | |
| tree | 728582a6a95073517918cbd5b2eb6fe8dbc84224 /target/i386/host-cpu.c | |
| parent | bb883fd67707fd7f1bf04369aafd7ea7ad5b01b0 (diff) | |
| download | qemu-ce21726525da53053432b19e27e9fd2a49086d78.zip qemu-ce21726525da53053432b19e27e9fd2a49086d78.tar.gz qemu-ce21726525da53053432b19e27e9fd2a49086d78.tar.bz2 | |
target/i386: fix host_cpu_adjust_phys_bits error handling
move the check for phys_bits outside of host_cpu_adjust_phys_bits,
because otherwise it is impossible to return an error condition
explicitly.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210322132800.7470-8-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/host-cpu.c')
| -rw-r--r-- | target/i386/host-cpu.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c index 9cfe56c..d07d41c 100644 --- a/target/i386/host-cpu.c +++ b/target/i386/host-cpu.c @@ -50,7 +50,7 @@ static void host_cpu_enable_cpu_pm(X86CPU *cpu) env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR; } -static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu, Error **errp) +static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu) { uint32_t host_phys_bits = host_cpu_phys_bits(); uint32_t phys_bits = cpu->phys_bits; @@ -77,14 +77,6 @@ static uint32_t host_cpu_adjust_phys_bits(X86CPU *cpu, Error **errp) } } - if (phys_bits && - (phys_bits > TARGET_PHYS_ADDR_SPACE_BITS || - phys_bits < 32)) { - error_setg(errp, "phys-bits should be between 32 and %u " - " (but is %u)", - TARGET_PHYS_ADDR_SPACE_BITS, phys_bits); - } - return phys_bits; } @@ -97,7 +89,17 @@ void host_cpu_realizefn(CPUState *cs, Error **errp) host_cpu_enable_cpu_pm(cpu); } if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) { - cpu->phys_bits = host_cpu_adjust_phys_bits(cpu, errp); + uint32_t phys_bits = host_cpu_adjust_phys_bits(cpu); + + if (phys_bits && + (phys_bits > TARGET_PHYS_ADDR_SPACE_BITS || + phys_bits < 32)) { + error_setg(errp, "phys-bits should be between 32 and %u " + " (but is %u)", + TARGET_PHYS_ADDR_SPACE_BITS, phys_bits); + return; + } + cpu->phys_bits = phys_bits; } } |