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author | Richard Henderson <richard.henderson@linaro.org> | 2024-01-29 09:22:51 +1000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2024-02-03 08:52:25 +1000 |
commit | 8f39cb77643828e08fe3320a0080dd0e27dd8e3b (patch) | |
tree | cd681f41a65fc5e3eaf805870dbf850e3b00d397 /target/hppa | |
parent | 3f605a15a7ec14885ba34d15758ccaeceeee9f49 (diff) | |
download | qemu-8f39cb77643828e08fe3320a0080dd0e27dd8e3b.zip qemu-8f39cb77643828e08fe3320a0080dd0e27dd8e3b.tar.gz qemu-8f39cb77643828e08fe3320a0080dd0e27dd8e3b.tar.bz2 |
target/hppa: Populate CPUClass.mmu_index
Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hppa')
-rw-r--r-- | target/hppa/cpu.c | 12 | ||||
-rw-r--r-- | target/hppa/cpu.h | 7 |
2 files changed, 14 insertions, 5 deletions
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 3c01985..fbb37e5 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -94,6 +94,17 @@ static bool hppa_cpu_has_work(CPUState *cs) return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI); } +int hppa_cpu_mmu_index(CPUState *cs, bool ifetch) +{ + CPUHPPAState *env = cpu_env(cs); + + if (env->psw & (ifetch ? PSW_C : PSW_D)) { + return PRIV_P_TO_MMU_IDX(env->iaoq_f & 3, env->psw & PSW_P); + } + /* mmu disabled */ + return env->psw & PSW_W ? MMU_ABS_W_IDX : MMU_ABS_IDX; +} + static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info) { info->mach = bfd_mach_hppa20; @@ -194,6 +205,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = hppa_cpu_class_by_name; cc->has_work = hppa_cpu_has_work; + cc->mmu_index = hppa_cpu_mmu_index; cc->dump_state = hppa_cpu_dump_state; cc->set_pc = hppa_cpu_set_pc; cc->get_pc = hppa_cpu_get_pc; diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 6a15340..04439f2 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -281,16 +281,13 @@ static inline int HPPA_BTLB_ENTRIES(CPUHPPAState *env) return hppa_is_pa20(env) ? 0 : PA10_BTLB_FIXED + PA10_BTLB_VARIABLE; } +int hppa_cpu_mmu_index(CPUState *cs, bool ifetch); static inline int cpu_mmu_index(CPUHPPAState *env, bool ifetch) { #ifdef CONFIG_USER_ONLY return MMU_USER_IDX; #else - if (env->psw & (ifetch ? PSW_C : PSW_D)) { - return PRIV_P_TO_MMU_IDX(env->iaoq_f & 3, env->psw & PSW_P); - } - /* mmu disabled */ - return env->psw & PSW_W ? MMU_ABS_W_IDX : MMU_ABS_IDX; + return hppa_cpu_mmu_index(env_cpu(env), ifetch); #endif } |