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| author | Sven Schnelle <svens@stackframe.org> | 2019-01-29 20:14:02 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2019-02-06 10:49:21 +0000 |
| commit | 68aa851aa21741ab0a3c019b641d6ce72f68b3d5 (patch) | |
| tree | d9e8ac235202070473020f2fcb63d0a59a839145 /target/hppa | |
| parent | 5c41496dd780fed67eadd64c59fc2cf21717ecf0 (diff) | |
| download | qemu-68aa851aa21741ab0a3c019b641d6ce72f68b3d5.zip qemu-68aa851aa21741ab0a3c019b641d6ce72f68b3d5.tar.gz qemu-68aa851aa21741ab0a3c019b641d6ce72f68b3d5.tar.bz2 | |
target/hppa: fix PSW Q bit behaviour to match hardware
PA-RISC specification says: "Setting the PSW Q-bit, PSW{28}, to 1
with this instruction, if it was not already 1, is an undefined
operation." However, at least HP-UX 10.20 sets the Q bit from 0 to 1
with the SSM instruction. Tested this both on HP9000/712 and
HP9000/785/C3750, both machines set the Q bit from 0 to 1 without
exception. This makes HP-UX 10.20 progress a little bit further.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Message-Id: <20190129191402.29539-1-svens@stackframe.org>
[rth: Add a comment to the code as well.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hppa')
| -rw-r--r-- | target/hppa/op_helper.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 912e8d5..6bf478e 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -665,11 +665,15 @@ void HELPER(reset)(CPUHPPAState *env) target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm) { target_ulong psw = env->psw; - /* ??? On second reading this condition simply seems - to be undefined rather than a diagnosed trap. */ - if (nsm & ~psw & PSW_Q) { - hppa_dynamic_excp(env, EXCP_ILL, GETPC()); - } + /* + * Setting the PSW Q bit to 1, if it was not already 1, is an + * undefined operation. + * + * However, HP-UX 10.20 does this with the SSM instruction. + * Tested this on HP9000/712 and HP9000/785/C3750 and both + * machines set the Q bit from 0 to 1 without an exception, + * so let this go without comment. + */ env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM); return psw & PSW_SM; } |