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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-09-21 12:07:22 +0200 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-11-06 18:49:34 -0800 |
| commit | 4e7abdb120d7456aaa754a7101ef43a5916ed8a0 (patch) | |
| tree | ae6301d64815e9f0d610a9e70ffbb00c15772db5 /target/hppa | |
| parent | c2a7ee3f9d7605f494d738825beef1b792bfb357 (diff) | |
| download | qemu-4e7abdb120d7456aaa754a7101ef43a5916ed8a0.zip qemu-4e7abdb120d7456aaa754a7101ef43a5916ed8a0.tar.gz qemu-4e7abdb120d7456aaa754a7101ef43a5916ed8a0.tar.bz2 | |
target/hppa: Implement PERMH
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hppa')
| -rw-r--r-- | target/hppa/insns.decode | 2 | ||||
| -rw-r--r-- | target/hppa/translate.c | 29 |
2 files changed, 31 insertions, 0 deletions
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 22ec07f..19e537d 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -238,6 +238,8 @@ mixh_r 111110 ..... ..... 1 10 00100000 ..... @rrr mixw_l 111110 ..... ..... 1 00 00000000 ..... @rrr mixw_r 111110 ..... ..... 1 10 00000000 ..... @rrr +permh 111110 r1:5 r2:5 0 c0:2 0 c1:2 c2:2 c3:2 0 t:5 + #### # Index Mem #### diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 2b47144..ffdd306 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2946,6 +2946,35 @@ static bool trans_mixw_r(DisasContext *ctx, arg_rrr *a) return do_multimedia(ctx, a, gen_mixw_r); } +static bool trans_permh(DisasContext *ctx, arg_permh *a) +{ + TCGv_i64 r, t0, t1, t2, t3; + + if (!ctx->is_pa20) { + return false; + } + + nullify_over(ctx); + + r = load_gpr(ctx, a->r1); + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + t2 = tcg_temp_new_i64(); + t3 = tcg_temp_new_i64(); + + tcg_gen_extract_i64(t0, r, (3 - a->c0) * 16, 16); + tcg_gen_extract_i64(t1, r, (3 - a->c1) * 16, 16); + tcg_gen_extract_i64(t2, r, (3 - a->c2) * 16, 16); + tcg_gen_extract_i64(t3, r, (3 - a->c3) * 16, 16); + + tcg_gen_deposit_i64(t0, t1, t0, 16, 48); + tcg_gen_deposit_i64(t2, t3, t2, 16, 48); + tcg_gen_deposit_i64(t0, t2, t0, 32, 32); + + save_gpr(ctx, a->t, t0); + return nullify_end(ctx); +} + static bool trans_ld(DisasContext *ctx, arg_ldst *a) { if (!ctx->is_pa20 && a->size > MO_32) { |