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authorRichard Henderson <richard.henderson@linaro.org>2024-03-25 17:06:03 -1000
committerRichard Henderson <richard.henderson@linaro.org>2024-03-27 12:15:25 -1000
commitfe2d066a9e3dc3d902ef7d3860c077563146b35b (patch)
treee489ed5ddac5aed66170cee5b92ec6a115a8467b /target/hppa/translate.c
parent82d0c831ceff6ae03c4ccc865999a7231972df2e (diff)
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target/hppa: Replace c with uv in do_cond
Prepare for proper indication of shladd unsigned overflow. The UV indicator will be zero/not-zero instead of a single bit. Tested-by: Helge Deller <deller@gmx.de> Reviewed-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hppa/translate.c')
-rw-r--r--target/hppa/translate.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index a70d644..9d31ef5 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -707,7 +707,7 @@ static bool cond_need_cb(int c)
*/
static DisasCond do_cond(DisasContext *ctx, unsigned cf, bool d,
- TCGv_i64 res, TCGv_i64 cb_msb, TCGv_i64 sv)
+ TCGv_i64 res, TCGv_i64 uv, TCGv_i64 sv)
{
DisasCond cond;
TCGv_i64 tmp;
@@ -754,14 +754,12 @@ static DisasCond do_cond(DisasContext *ctx, unsigned cf, bool d,
}
cond = cond_make_0_tmp(TCG_COND_EQ, tmp);
break;
- case 4: /* NUV / UV (!C / C) */
- /* Only bit 0 of cb_msb is ever set. */
- cond = cond_make_0(TCG_COND_EQ, cb_msb);
+ case 4: /* NUV / UV (!UV / UV) */
+ cond = cond_make_0(TCG_COND_EQ, uv);
break;
- case 5: /* ZNV / VNZ (!C | Z / C & !Z) */
+ case 5: /* ZNV / VNZ (!UV | Z / UV & !Z) */
tmp = tcg_temp_new_i64();
- tcg_gen_neg_i64(tmp, cb_msb);
- tcg_gen_and_i64(tmp, tmp, res);
+ tcg_gen_movcond_i64(TCG_COND_EQ, tmp, uv, ctx->zero, ctx->zero, res);
if (!d) {
tcg_gen_ext32u_i64(tmp, tmp);
}