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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-03-25 12:20:31 -1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-05-15 10:03:44 +0200 |
| commit | f33a22c1a28f0ba7b9c2fef1953aa6f593da870d (patch) | |
| tree | 2f645afc35d94821d81b86134ca9da7af192a58b /target/hppa/translate.c | |
| parent | b041ec9d7173ec893c1a5bc0bfd25fe860b4fcb0 (diff) | |
| download | qemu-f33a22c1a28f0ba7b9c2fef1953aa6f593da870d.zip qemu-f33a22c1a28f0ba7b9c2fef1953aa6f593da870d.tar.gz qemu-f33a22c1a28f0ba7b9c2fef1953aa6f593da870d.tar.bz2 | |
target/hppa: Use registerfields.h for FPSR
Define all of the context dependent field definitions.
Use FIELD_EX32 and FIELD_DP32 with named fields instead
of extract32 and deposit32 with raw constants.
Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hppa/translate.c')
| -rw-r--r-- | target/hppa/translate.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/target/hppa/translate.c b/target/hppa/translate.c index af6be51..efd4398 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -4324,29 +4324,28 @@ static bool trans_ftest(DisasContext *ctx, arg_ftest *a) switch (a->c) { case 0: /* simple */ - tcg_gen_andi_i64(t, t, 0x4000000); - ctx->null_cond = cond_make_ti(TCG_COND_NE, t, 0); - goto done; + mask = R_FPSR_C_MASK; + break; case 2: /* rej */ inv = true; /* fallthru */ case 1: /* acc */ - mask = 0x43ff800; + mask = R_FPSR_C_MASK | R_FPSR_CQ_MASK; break; case 6: /* rej8 */ inv = true; /* fallthru */ case 5: /* acc8 */ - mask = 0x43f8000; + mask = R_FPSR_C_MASK | R_FPSR_CQ0_6_MASK; break; case 9: /* acc6 */ - mask = 0x43e0000; + mask = R_FPSR_C_MASK | R_FPSR_CQ0_4_MASK; break; case 13: /* acc4 */ - mask = 0x4380000; + mask = R_FPSR_C_MASK | R_FPSR_CQ0_2_MASK; break; case 17: /* acc2 */ - mask = 0x4200000; + mask = R_FPSR_C_MASK | R_FPSR_CQ0_MASK; break; default: gen_illegal(ctx); @@ -4363,11 +4362,10 @@ static bool trans_ftest(DisasContext *ctx, arg_ftest *a) } else { unsigned cbit = (a->y ^ 1) - 1; - tcg_gen_extract_i64(t, t, 21 - cbit, 1); + tcg_gen_extract_i64(t, t, R_FPSR_CA0_SHIFT - cbit, 1); ctx->null_cond = cond_make_ti(TCG_COND_NE, t, 0); } - done: return nullify_end(ctx); } |