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| author | Helge Deller <deller@gmx.de> | 2023-11-07 22:32:36 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-11-12 09:01:22 -0800 |
| commit | 881d1073d0f83d9a07e5ea3ff444e1bef9679a7c (patch) | |
| tree | a9be0c51973051325c8d648e4e59257ccb30b39e /target/hppa/translate.c | |
| parent | 69680740eafa1838527c90155a7432d51b8ff203 (diff) | |
| download | qemu-881d1073d0f83d9a07e5ea3ff444e1bef9679a7c.zip qemu-881d1073d0f83d9a07e5ea3ff444e1bef9679a7c.tar.gz qemu-881d1073d0f83d9a07e5ea3ff444e1bef9679a7c.tar.bz2 | |
target/hppa: Mask reserved PSW bits in expand_sm_imm
The system mask is a restricted subset of the psw, with only
a couple of reserved bits. It is better to handle this up
front in the translator than require helper_swap_system_mask
to use cpu_hppa_get_psw and cpu_hppa_put_psw.
Signed-off-by: Helge Deller <deller@gmx.de>
[rth: Handle this in expand_sm_imm not helper_swap_system_mask.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hppa/translate.c')
| -rw-r--r-- | target/hppa/translate.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/target/hppa/translate.c b/target/hppa/translate.c index bcce65d..f3b17ba 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -77,11 +77,14 @@ typedef struct DisasContext { /* Note that ssm/rsm instructions number PSW_W and PSW_E differently. */ static int expand_sm_imm(DisasContext *ctx, int val) { - if (val & PSW_SM_E) { - val = (val & ~PSW_SM_E) | PSW_E; - } - if (val & PSW_SM_W) { - val = (val & ~PSW_SM_W) | PSW_W; + /* Keep unimplemented bits disabled -- see cpu_hppa_put_psw. */ + if (ctx->is_pa20) { + if (val & PSW_SM_W) { + val |= PSW_W; + } + val &= ~(PSW_SM_W | PSW_SM_E | PSW_G); + } else { + val &= ~(PSW_SM_W | PSW_SM_E | PSW_O); } return val; } |