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authorTaylor Simpson <tsimpson@quicinc.com>2022-11-08 08:28:56 -0800
committerTaylor Simpson <tsimpson@quicinc.com>2022-12-16 10:10:28 -0800
commit1e536334ccb0a1606f814a38a4996b3b818e9fab (patch)
tree6f2eef486fda1a451a808ca415d217ea587130c0 /target/hexagon/mmvec/macros.h
parent4208e6ae114ac8266dcacc9696a443ce5c37b04e (diff)
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Hexagon (target/hexagon) Add pkt and insn to DisasContext
This enables us to reduce the number of parameters to many functions In particular, the generated functions previously took all 3 as arguments Not only does this simplify the code, it improves the translation time Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Message-Id: <20221108162906.3166-2-tsimpson@quicinc.com>
Diffstat (limited to 'target/hexagon/mmvec/macros.h')
-rw-r--r--target/hexagon/mmvec/macros.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/hexagon/mmvec/macros.h b/target/hexagon/mmvec/macros.h
index 8345753..8c864e8 100644
--- a/target/hexagon/mmvec/macros.h
+++ b/target/hexagon/mmvec/macros.h
@@ -288,7 +288,7 @@
#endif
#ifdef QEMU_GENERATE
#define fSTOREMMV(EA, SRC) \
- gen_vreg_store(ctx, insn, pkt, EA, SRC##_off, insn->slot, true)
+ gen_vreg_store(ctx, EA, SRC##_off, insn->slot, true)
#endif
#ifdef QEMU_GENERATE
#define fSTOREMMVQ(EA, SRC, MASK) \
@@ -300,7 +300,7 @@
#endif
#ifdef QEMU_GENERATE
#define fSTOREMMVU(EA, SRC) \
- gen_vreg_store(ctx, insn, pkt, EA, SRC##_off, insn->slot, false)
+ gen_vreg_store(ctx, EA, SRC##_off, insn->slot, false)
#endif
#define fVFOREACH(WIDTH, VAR) for (VAR = 0; VAR < fVELEM(WIDTH); VAR++)
#define fVARRAY_ELEMENT_ACCESS(ARRAY, TYPE, INDEX) \