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authorTaylor Simpson <tsimpson@quicinc.com>2021-04-08 20:07:45 -0500
committerRichard Henderson <richard.henderson@linaro.org>2021-05-01 08:31:43 -0700
commitd934c16d8a1e0fb82fd4abfa54dcb5217430577c (patch)
tree4f98424f1036f09e712d80be7ba95faf130c17ab /target/hexagon/gen_tcg.h
parent85580a65577898288a29d849160601895979c661 (diff)
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Hexagon (target/hexagon) add F2_sfrecipa instruction
Rd32,Pe4 = sfrecipa(Rs32, Rt32) Recripocal approx Test cases in tests/tcg/hexagon/multi_result.c FP exception tests added to tests/tcg/hexagon/fpstuff.c Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-18-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hexagon/gen_tcg.h')
-rw-r--r--target/hexagon/gen_tcg.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/target/hexagon/gen_tcg.h b/target/hexagon/gen_tcg.h
index a30048e..428a670 100644
--- a/target/hexagon/gen_tcg.h
+++ b/target/hexagon/gen_tcg.h
@@ -195,6 +195,27 @@
#define fGEN_TCG_S4_stored_locked(SHORTCODE) \
do { SHORTCODE; READ_PREG(PdV, PdN); } while (0)
+/*
+ * Mathematical operations with more than one definition require
+ * special handling
+ */
+
+/*
+ * Approximate reciprocal
+ * r3,p1 = sfrecipa(r0, r1)
+ *
+ * The helper packs the 2 32-bit results into a 64-bit value,
+ * so unpack them into the proper results.
+ */
+#define fGEN_TCG_F2_sfrecipa(SHORTCODE) \
+ do { \
+ TCGv_i64 tmp = tcg_temp_new_i64(); \
+ gen_helper_sfrecipa(tmp, cpu_env, RsV, RtV); \
+ tcg_gen_extrh_i64_i32(RdV, tmp); \
+ tcg_gen_extrl_i64_i32(PeV, tmp); \
+ tcg_temp_free_i64(tmp); \
+ } while (0)
+
/* Floating point */
#define fGEN_TCG_F2_conv_sf2df(SHORTCODE) \
gen_helper_conv_sf2df(RddV, cpu_env, RsV)