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| author | Peter Maydell <peter.maydell@linaro.org> | 2020-05-12 17:38:58 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-05-14 15:03:09 +0100 |
| commit | a26a352bb498662cd0c205cb433a352f86fac7d2 (patch) | |
| tree | 28a7a93c08ee8a552ef00d8b5ca264f8e63ab988 /target/arm/vec_helper.c | |
| parent | 7ecc28bc72b8033cf4e0c6332135ec20d4125dfb (diff) | |
| download | qemu-a26a352bb498662cd0c205cb433a352f86fac7d2.zip qemu-a26a352bb498662cd0c205cb433a352f86fac7d2.tar.gz qemu-a26a352bb498662cd0c205cb433a352f86fac7d2.tar.bz2 | |
target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree
Convert the Neon VADD, VSUB, VABD 3-reg-same insns to decodetree.
We already have gvec helpers for addition and subtraction, but must
add one for fabd.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200512163904.10918-12-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/vec_helper.c')
| -rw-r--r-- | target/arm/vec_helper.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/vec_helper.c b/target/arm/vec_helper.c index fa33df8..50a4992 100644 --- a/target/arm/vec_helper.c +++ b/target/arm/vec_helper.c @@ -691,6 +691,11 @@ static float64 float64_ftsmul(float64 op1, uint64_t op2, float_status *stat) return result; } +static float32 float32_abd(float32 op1, float32 op2, float_status *stat) +{ + return float32_abs(float32_sub(op1, op2, stat)); +} + #define DO_3OP(NAME, FUNC, TYPE) \ void HELPER(NAME)(void *vd, void *vn, void *vm, void *stat, uint32_t desc) \ { \ @@ -718,6 +723,8 @@ DO_3OP(gvec_ftsmul_h, float16_ftsmul, float16) DO_3OP(gvec_ftsmul_s, float32_ftsmul, float32) DO_3OP(gvec_ftsmul_d, float64_ftsmul, float64) +DO_3OP(gvec_fabd_s, float32_abd, float32) + #ifdef TARGET_AARCH64 DO_3OP(gvec_recps_h, helper_recpsf_f16, float16) |