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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-03-07 12:19:04 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-03-07 12:19:04 +0000 |
| commit | c10a9a517a4518a2b886d5796f90aa1c7a0530f6 (patch) | |
| tree | 50d7667617fc40415d41e410bc877a02f58abbe0 /target/arm/tcg | |
| parent | 2808d3b38a5232e263338e1b812bb1f6c2d56bcf (diff) | |
| download | qemu-c10a9a517a4518a2b886d5796f90aa1c7a0530f6.zip qemu-c10a9a517a4518a2b886d5796f90aa1c7a0530f6.tar.gz qemu-c10a9a517a4518a2b886d5796f90aa1c7a0530f6.tar.bz2 | |
target/arm: Enable FEAT_ECV for 'max' CPU
Enable all FEAT_ECV features on the 'max' CPU.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240301183219.2424889-9-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/tcg')
| -rw-r--r-- | target/arm/tcg/cpu64.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c index 5fba2c0..9f7a9f3 100644 --- a/target/arm/tcg/cpu64.c +++ b/target/arm/tcg/cpu64.c @@ -1184,6 +1184,7 @@ void aarch64_max_tcg_initfn(Object *obj) t = FIELD_DP64(t, ID_AA64MMFR0, TGRAN64_2, 2); /* 64k stage2 supported */ t = FIELD_DP64(t, ID_AA64MMFR0, TGRAN4_2, 2); /* 4k stage2 supported */ t = FIELD_DP64(t, ID_AA64MMFR0, FGT, 1); /* FEAT_FGT */ + t = FIELD_DP64(t, ID_AA64MMFR0, ECV, 2); /* FEAT_ECV */ cpu->isar.id_aa64mmfr0 = t; t = cpu->isar.id_aa64mmfr1; |