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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:43:51 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:43:51 +0000 |
| commit | 1274a47fbd9739b628835936dbefa0294d9dd32c (patch) | |
| tree | 4eabfe6fbe2a11fe67a9622f4bc07e96dc12de44 /target/arm/tcg | |
| parent | dea9104a4f85388a1419701a18eb33c354f5658f (diff) | |
| download | qemu-1274a47fbd9739b628835936dbefa0294d9dd32c.zip qemu-1274a47fbd9739b628835936dbefa0294d9dd32c.tar.gz qemu-1274a47fbd9739b628835936dbefa0294d9dd32c.tar.bz2 | |
target/arm: Add FEAT_NV to max, neoverse-n2, neoverse-v1 CPUs
Enable FEAT_NV on the 'max' CPU, and stop filtering it out for the
Neoverse N2 and Neoverse V1 CPUs. We continue to downgrade FEAT_NV2
support to FEAT_NV for the latter two CPU types.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
Diffstat (limited to 'target/arm/tcg')
| -rw-r--r-- | target/arm/tcg/cpu64.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c index 40e7a45..93f040e 100644 --- a/target/arm/tcg/cpu64.c +++ b/target/arm/tcg/cpu64.c @@ -1204,6 +1204,7 @@ void aarch64_max_tcg_initfn(Object *obj) t = FIELD_DP64(t, ID_AA64MMFR2, UAO, 1); /* FEAT_UAO */ t = FIELD_DP64(t, ID_AA64MMFR2, IESB, 1); /* FEAT_IESB */ t = FIELD_DP64(t, ID_AA64MMFR2, VARANGE, 1); /* FEAT_LVA */ + t = FIELD_DP64(t, ID_AA64MMFR2, NV, 1); /* FEAT_NV */ t = FIELD_DP64(t, ID_AA64MMFR2, ST, 1); /* FEAT_TTST */ t = FIELD_DP64(t, ID_AA64MMFR2, AT, 1); /* FEAT_LSE2 */ t = FIELD_DP64(t, ID_AA64MMFR2, IDS, 1); /* FEAT_IDST */ |