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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-04-18 16:20:04 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-04-30 15:01:07 +0100 |
| commit | 663163f00785805e61f524ef744914029b2b6a87 (patch) | |
| tree | 4c35bfc2ce4412de7ebd4b453595835db564b302 /target/arm/tcg/cpu64.c | |
| parent | f7ddd7b6a1f90cae677303e96b91e866a1570f6a (diff) | |
| download | qemu-663163f00785805e61f524ef744914029b2b6a87.zip qemu-663163f00785805e61f524ef744914029b2b6a87.tar.gz qemu-663163f00785805e61f524ef744914029b2b6a87.tar.bz2 | |
target/arm: Enable FEAT_Spec_FPACC for -cpu max
FEAT_Spec_FPACC is a feature describing speculative behaviour in the
event of a PAC authontication failure when FEAT_FPACCOMBINE is
implemented. FEAT_Spec_FPACC means that the speculative use of
pointers processed by a PAC Authentication is not materially
different in terms of the impact on cached microarchitectural state
(caches, TLBs, etc) between passing and failing of the PAC
Authentication.
QEMU doesn't do speculative execution, so we can advertise
this feature.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240418152004.2106516-6-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/tcg/cpu64.c')
| -rw-r--r-- | target/arm/tcg/cpu64.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c index ebb585a..443cffe 100644 --- a/target/arm/tcg/cpu64.c +++ b/target/arm/tcg/cpu64.c @@ -1217,6 +1217,10 @@ void aarch64_max_tcg_initfn(Object *obj) t = FIELD_DP64(t, ID_AA64MMFR2, E0PD, 1); /* FEAT_E0PD */ cpu->isar.id_aa64mmfr2 = t; + t = cpu->isar.id_aa64mmfr3; + t = FIELD_DP64(t, ID_AA64MMFR3, SPEC_FPACC, 1); /* FEAT_FPACC_SPEC */ + cpu->isar.id_aa64mmfr3 = t; + t = cpu->isar.id_aa64zfr0; t = FIELD_DP64(t, ID_AA64ZFR0, SVEVER, 1); t = FIELD_DP64(t, ID_AA64ZFR0, AES, 2); /* FEAT_SVE_PMULL128 */ |