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author | Peter Maydell <peter.maydell@linaro.org> | 2021-06-17 13:16:27 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-06-24 14:58:48 +0100 |
commit | 6f060a636bf46869e43a28a0f426ddaea16314f9 (patch) | |
tree | 81105b58daa4731ef7353fb3528a06304c1129d5 /target/arm/mve.decode | |
parent | 8625693ac48f54e87f663736c0bbde7ea450f1f7 (diff) | |
download | qemu-6f060a636bf46869e43a28a0f426ddaea16314f9.zip qemu-6f060a636bf46869e43a28a0f426ddaea16314f9.tar.gz qemu-6f060a636bf46869e43a28a0f426ddaea16314f9.tar.bz2 |
target/arm: Implement MVE VADDV
Implement the MVE VADDV insn, which performs an addition
across vector lanes.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210617121628.20116-44-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/mve.decode')
-rw-r--r-- | target/arm/mve.decode | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/mve.decode b/target/arm/mve.decode index 695097d..d9ece7b 100644 --- a/target/arm/mve.decode +++ b/target/arm/mve.decode @@ -252,6 +252,8 @@ VBRSR 1111 1110 0 . .. ... 1 ... 1 1110 . 110 .... @2scalar VQDMULH_scalar 1110 1110 0 . .. ... 1 ... 0 1110 . 110 .... @2scalar VQRDMULH_scalar 1111 1110 0 . .. ... 1 ... 0 1110 . 110 .... @2scalar +# Vector add across vector +VADDV 111 u:1 1110 1111 size:2 01 ... 0 1111 0 0 a:1 0 qm:3 0 rda=%rdalo # Predicate operations %mask_22_13 22:1 13:3 |