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author | Richard Henderson <richard.henderson@linaro.org> | 2023-06-23 11:15:44 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2023-06-23 11:15:44 +0100 |
commit | 5d28ac0cf7a5cd91f03da658edd6e934c5a431bd (patch) | |
tree | b1c62b8913cb95d7bd5a329533d85d9f819511ed /target/arm/helper.c | |
parent | ef1febe758c893dfc2164c5324bbbe5ba4916413 (diff) | |
download | qemu-5d28ac0cf7a5cd91f03da658edd6e934c5a431bd.zip qemu-5d28ac0cf7a5cd91f03da658edd6e934c5a431bd.tar.gz qemu-5d28ac0cf7a5cd91f03da658edd6e934c5a431bd.tar.bz2 |
target/arm: Introduce ARMSecuritySpace
Introduce both the enumeration and functions to retrieve
the current state, and state outside of EL3.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230620124418.805717-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/helper.c')
-rw-r--r-- | target/arm/helper.c | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 006447d..f68923d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -12136,3 +12136,63 @@ void aarch64_sve_change_el(CPUARMState *env, int old_el, } } #endif + +#ifndef CONFIG_USER_ONLY +ARMSecuritySpace arm_security_space(CPUARMState *env) +{ + if (arm_feature(env, ARM_FEATURE_M)) { + return arm_secure_to_space(env->v7m.secure); + } + + /* + * If EL3 is not supported then the secure state is implementation + * defined, in which case QEMU defaults to non-secure. + */ + if (!arm_feature(env, ARM_FEATURE_EL3)) { + return ARMSS_NonSecure; + } + + /* Check for AArch64 EL3 or AArch32 Mon. */ + if (is_a64(env)) { + if (extract32(env->pstate, 2, 2) == 3) { + if (cpu_isar_feature(aa64_rme, env_archcpu(env))) { + return ARMSS_Root; + } else { + return ARMSS_Secure; + } + } + } else { + if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON) { + return ARMSS_Secure; + } + } + + return arm_security_space_below_el3(env); +} + +ARMSecuritySpace arm_security_space_below_el3(CPUARMState *env) +{ + assert(!arm_feature(env, ARM_FEATURE_M)); + + /* + * If EL3 is not supported then the secure state is implementation + * defined, in which case QEMU defaults to non-secure. + */ + if (!arm_feature(env, ARM_FEATURE_EL3)) { + return ARMSS_NonSecure; + } + + /* + * Note NSE cannot be set without RME, and NSE & !NS is Reserved. + * Ignoring NSE when !NS retains consistency without having to + * modify other predicates. + */ + if (!(env->cp15.scr_el3 & SCR_NS)) { + return ARMSS_Secure; + } else if (env->cp15.scr_el3 & SCR_NSE) { + return ARMSS_Realm; + } else { + return ARMSS_NonSecure; + } +} +#endif /* !CONFIG_USER_ONLY */ |