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author | Peter Maydell <peter.maydell@linaro.org> | 2017-09-04 15:21:53 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-09-04 15:21:53 +0100 |
commit | 15b3f556bab4f961bf92141eb8521c8da3df5eb2 (patch) | |
tree | abfae05454a9ca80faefd84248d2288b49682cd8 /target/arm/helper.c | |
parent | bd70b29ba92e4446f9e4eb8b9acc19ef6ff4a4d5 (diff) | |
download | qemu-15b3f556bab4f961bf92141eb8521c8da3df5eb2.zip qemu-15b3f556bab4f961bf92141eb8521c8da3df5eb2.tar.gz qemu-15b3f556bab4f961bf92141eb8521c8da3df5eb2.tar.bz2 |
target/arm: Create and use new function arm_v7m_is_handler_mode()
Add a utility function for testing whether the CPU is in Handler
mode; this is just a check whether v7m.exception is non-zero, but
we do it in several places and it makes the code a bit easier
to read to not have to mentally figure out what the test is testing.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1501692241-23310-14-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/helper.c')
-rw-r--r-- | target/arm/helper.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 267a170..37e7fd9 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6142,7 +6142,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu) * that jumps to magic addresses don't have magic behaviour unless * we're in Handler mode (compare pseudocode BXWritePC()). */ - assert(env->v7m.exception != 0); + assert(arm_v7m_is_handler_mode(env)); /* In the spec pseudocode ExceptionReturn() is called directly * from BXWritePC() and gets the full target PC value including @@ -6249,7 +6249,7 @@ static void do_v7m_exception_exit(ARMCPU *cpu) * resuming in Thread mode. If that doesn't match what the * exception return type specified then this is a UsageFault. */ - if (return_to_handler == (env->v7m.exception == 0)) { + if (return_to_handler != arm_v7m_is_handler_mode(env)) { /* Take an INVPC UsageFault by pushing the stack again. */ armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE); env->v7m.cfsr |= R_V7M_CFSR_INVPC_MASK; @@ -6400,7 +6400,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) if (env->v7m.control & R_V7M_CONTROL_SPSEL_MASK) { lr |= 4; } - if (env->v7m.exception == 0) { + if (!arm_v7m_is_handler_mode(env)) { lr |= 8; } @@ -8793,7 +8793,7 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) * switch_v7m_sp() deals with updating the SPSEL bit in * env->v7m.control, so we only need update the others. */ - if (env->v7m.exception == 0) { + if (!arm_v7m_is_handler_mode(env)) { switch_v7m_sp(env, (val & R_V7M_CONTROL_SPSEL_MASK) != 0); } env->v7m.control &= ~R_V7M_CONTROL_NPRIV_MASK; |