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| author | Aaron Lindsay <aaron@os.amperecomputing.com> | 2019-01-21 10:23:14 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-01-21 10:38:56 +0000 |
| commit | 57a4a11b2b281bb548b419ca81bfafb214e4c77a (patch) | |
| tree | b5e07b8cc53a4b987034c9b646225b58f00b6904 /target/arm/cpu64.c | |
| parent | cad8673744d0914587cd7380e70df11e8c4a0f50 (diff) | |
| download | qemu-57a4a11b2b281bb548b419ca81bfafb214e4c77a.zip qemu-57a4a11b2b281bb548b419ca81bfafb214e4c77a.tar.gz qemu-57a4a11b2b281bb548b419ca81bfafb214e4c77a.tar.bz2 | |
target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0
This commit doesn't add any supported events, but provides the framework
for adding them. We store the pm_event structs in a simple array, and
provide the mapping from the event numbers to array indexes in the
supported_event_map array. Because the value of PMCEID[01] depends upon
which events are supported at runtime, generate it dynamically.
Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20181211151945.29137-10-aaron@os.amperecomputing.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu64.c')
| -rw-r--r-- | target/arm/cpu64.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index d0de0d5..e9bc461 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -138,8 +138,6 @@ static void aarch64_a57_initfn(Object *obj) cpu->isar.id_isar6 = 0; cpu->isar.id_aa64pfr0 = 0x00002222; cpu->id_aa64dfr0 = 0x10305106; - cpu->pmceid0 = 0x00000000; - cpu->pmceid1 = 0x00000000; cpu->isar.id_aa64isar0 = 0x00011120; cpu->isar.id_aa64mmfr0 = 0x00001124; cpu->dbgdidr = 0x3516d000; @@ -246,8 +244,6 @@ static void aarch64_a72_initfn(Object *obj) cpu->isar.id_isar5 = 0x00011121; cpu->isar.id_aa64pfr0 = 0x00002222; cpu->id_aa64dfr0 = 0x10305106; - cpu->pmceid0 = 0x00000000; - cpu->pmceid1 = 0x00000000; cpu->isar.id_aa64isar0 = 0x00011120; cpu->isar.id_aa64mmfr0 = 0x00001124; cpu->dbgdidr = 0x3516d000; |