From 57a4a11b2b281bb548b419ca81bfafb214e4c77a Mon Sep 17 00:00:00 2001 From: Aaron Lindsay Date: Mon, 21 Jan 2019 10:23:14 +0000 Subject: target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0 This commit doesn't add any supported events, but provides the framework for adding them. We store the pm_event structs in a simple array, and provide the mapping from the event numbers to array indexes in the supported_event_map array. Because the value of PMCEID[01] depends upon which events are supported at runtime, generate it dynamically. Signed-off-by: Aaron Lindsay Reviewed-by: Peter Maydell Message-id: 20181211151945.29137-10-aaron@os.amperecomputing.com Signed-off-by: Peter Maydell --- target/arm/cpu64.c | 4 ---- 1 file changed, 4 deletions(-) (limited to 'target/arm/cpu64.c') diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index d0de0d5..e9bc461 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -138,8 +138,6 @@ static void aarch64_a57_initfn(Object *obj) cpu->isar.id_isar6 = 0; cpu->isar.id_aa64pfr0 = 0x00002222; cpu->id_aa64dfr0 = 0x10305106; - cpu->pmceid0 = 0x00000000; - cpu->pmceid1 = 0x00000000; cpu->isar.id_aa64isar0 = 0x00011120; cpu->isar.id_aa64mmfr0 = 0x00001124; cpu->dbgdidr = 0x3516d000; @@ -246,8 +244,6 @@ static void aarch64_a72_initfn(Object *obj) cpu->isar.id_isar5 = 0x00011121; cpu->isar.id_aa64pfr0 = 0x00002222; cpu->id_aa64dfr0 = 0x10305106; - cpu->pmceid0 = 0x00000000; - cpu->pmceid1 = 0x00000000; cpu->isar.id_aa64isar0 = 0x00011120; cpu->isar.id_aa64mmfr0 = 0x00001124; cpu->dbgdidr = 0x3516d000; -- cgit v1.1