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| author | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:43:45 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-01-09 14:43:45 +0000 |
| commit | e37e98b7f9f69240f73ed7050cd182466ddf3629 (patch) | |
| tree | 03bfde95f4f12bcfe08df4d2d0d25b37fc0adf55 /target/arm/cpu.h | |
| parent | 572597791555c544169e49b9a5c3a4043ea4949b (diff) | |
| download | qemu-e37e98b7f9f69240f73ed7050cd182466ddf3629.zip qemu-e37e98b7f9f69240f73ed7050cd182466ddf3629.tar.gz qemu-e37e98b7f9f69240f73ed7050cd182466ddf3629.tar.bz2 | |
target/arm: Enable trapping of ERET for FEAT_NV
When FEAT_NV is turned on via the HCR_EL2.NV bit, ERET instructions
are trapped, with the same syndrome information as for the existing
FEAT_FGT fine-grained trap (in the pseudocode this is handled in
AArch64.CheckForEretTrap()).
Rename the DisasContext and tbflag bits to reflect that they are
no longer exclusively for FGT traps, and set the tbflag bit when
FEAT_NV is enabled as well as when the FGT is enabled.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Miguel Luis <miguel.luis@oracle.com>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 8c3ca2e..8da6bfd 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3232,7 +3232,7 @@ FIELD(TBFLAG_A64, PSTATE_ZA, 23, 1) FIELD(TBFLAG_A64, SVL, 24, 4) /* Indicates that SME Streaming mode is active, and SMCR_ELx.FA64 is not. */ FIELD(TBFLAG_A64, SME_TRAP_NONSTREAMING, 28, 1) -FIELD(TBFLAG_A64, FGT_ERET, 29, 1) +FIELD(TBFLAG_A64, TRAP_ERET, 29, 1) FIELD(TBFLAG_A64, NAA, 30, 1) FIELD(TBFLAG_A64, ATA0, 31, 1) |