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authorRichard Henderson <richard.henderson@linaro.org>2018-10-08 14:55:03 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-10-08 14:55:03 +0100
commitced3155141755ba244c988c72c4bde32cc819670 (patch)
tree74fd05f04bff07023770c6258c79980baba61da1 /target/arm/cpu.h
parent0ab5953b00b3165877d00cf75de628c51670b550 (diff)
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target/arm: Adjust aarch64_cpu_dump_state for system mode SVE
Use the existing helpers to determine if (1) the fpu is enabled, (2) sve state is enabled, and (3) the current sve vector length. Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181005175350.30752-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r--target/arm/cpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a4ee83d..da4d388 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -920,6 +920,10 @@ target_ulong do_arm_semihosting(CPUARMState *env);
void aarch64_sync_32_to_64(CPUARMState *env);
void aarch64_sync_64_to_32(CPUARMState *env);
+int fp_exception_el(CPUARMState *env, int cur_el);
+int sve_exception_el(CPUARMState *env, int cur_el);
+uint32_t sve_zcr_len_for_el(CPUARMState *env, int el);
+
static inline bool is_a64(CPUARMState *env)
{
return env->aarch64;