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authorGavin Shan <gshan@redhat.com>2023-11-15 09:56:05 +1000
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2024-01-05 16:20:14 +0100
commitb5154a2d61ec07bde26e66019542f82acaa9f14c (patch)
treedf88cb54a4ac92fbd489e4d2f3ba41f4e3bc767e /target/arm/cpu.h
parent51d49bd1db9ad1dd51196471472f0908f2fe5ba9 (diff)
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target/arm: Use generic cpu_list()
No changes of the output from the following command before and after it's applied. [gshan@gshan q]$ ./build/qemu-system-aarch64 -cpu ? Available CPUs: a64fx arm1026 arm1136 arm1136-r2 arm1176 arm11mpcore arm926 arm946 cortex-a15 cortex-a35 cortex-a53 cortex-a55 cortex-a57 cortex-a7 cortex-a710 cortex-a72 cortex-a76 cortex-a8 cortex-a9 cortex-m0 cortex-m3 cortex-m33 cortex-m4 cortex-m55 cortex-m7 cortex-r5 cortex-r52 cortex-r5f max neoverse-n1 neoverse-n2 neoverse-v1 pxa250 pxa255 pxa260 pxa261 pxa262 pxa270-a0 pxa270-a1 pxa270 pxa270-b0 pxa270-b1 pxa270-c0 pxa270-c5 sa1100 sa1110 ti925t Signed-off-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20231114235628.534334-9-gshan@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r--target/arm/cpu.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a0282e0..8c3ca2e 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2737,7 +2737,6 @@ static inline bool access_secure_reg(CPUARMState *env)
(arm_is_secure(_env) && !arm_el_is_aa64((_env), 3)), \
(_val))
-void arm_cpu_list(void);
uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx,
uint32_t cur_el, bool secure);
@@ -2840,8 +2839,6 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_sync);
#define TYPE_ARM_HOST_CPU "host-" TYPE_ARM_CPU
-#define cpu_list arm_cpu_list
-
/* ARM has the following "translation regimes" (as the ARM ARM calls them):
*
* If EL3 is 64-bit: