diff options
| author | Andrew Jeffery <andrew@aj.id.au> | 2019-12-20 14:02:59 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-12-20 14:02:59 +0000 |
| commit | 7def87548272f6f3831c7ae5ba713c5ccbd5d547 (patch) | |
| tree | 0cefbe1358746d78f058e62cd67154e3ac6b0771 /target/arm/cpu.c | |
| parent | 4a0245b62502ee9ca7774712de4bb05d9bf47152 (diff) | |
| download | qemu-7def87548272f6f3831c7ae5ba713c5ccbd5d547.zip qemu-7def87548272f6f3831c7ae5ba713c5ccbd5d547.tar.gz qemu-7def87548272f6f3831c7ae5ba713c5ccbd5d547.tar.bz2 | |
target/arm: Abstract the generic timer frequency
Prepare for SoCs such as the ASPEED AST2600 whose firmware configures
CNTFRQ to values significantly larger than the static 62.5MHz value
currently derived from GTIMER_SCALE. As the OS potentially derives its
timer periods from the CNTFRQ value the lack of support for running
QEMUTimers at the appropriate rate leads to sticky behaviour in the
guest.
Substitute the GTIMER_SCALE constant with use of a helper to derive the
period from gt_cntfrq_hz stored in struct ARMCPU. Initially set
gt_cntfrq_hz to the frequency associated with GTIMER_SCALE so current
behaviour is maintained.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 40bd8df043f66e1ccfb3e9482999d099ac72bb2e.1576215453.git-series.andrew@aj.id.au
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.c')
| -rw-r--r-- | target/arm/cpu.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index dd51ada..0abe288 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -974,6 +974,8 @@ static void arm_cpu_initfn(Object *obj) if (tcg_enabled()) { cpu->psci_version = 2; /* TCG implements PSCI 0.2 */ } + + cpu->gt_cntfrq_hz = NANOSECONDS_PER_SECOND / GTIMER_SCALE; } static Property arm_cpu_reset_cbar_property = @@ -1055,6 +1057,12 @@ static void arm_set_init_svtor(Object *obj, Visitor *v, const char *name, visit_type_uint32(v, name, &cpu->init_svtor, errp); } +unsigned int gt_cntfrq_period_ns(ARMCPU *cpu) +{ + return NANOSECONDS_PER_SECOND > cpu->gt_cntfrq_hz ? + NANOSECONDS_PER_SECOND / cpu->gt_cntfrq_hz : 1; +} + void arm_cpu_post_init(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); |