diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2024-05-03 09:20:06 +0200 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-05-04 07:38:08 -0700 |
| commit | 1bcae46aac60ae0efbeb3957f7679da9e7e50f30 (patch) | |
| tree | 4e61a545d91c8d2be42de3c8f77c1fa4c11b8470 /target/alpha | |
| parent | ab709f13b8d44466787f4f53e6333b747d813afb (diff) | |
| download | qemu-1bcae46aac60ae0efbeb3957f7679da9e7e50f30.zip qemu-1bcae46aac60ae0efbeb3957f7679da9e7e50f30.tar.gz qemu-1bcae46aac60ae0efbeb3957f7679da9e7e50f30.tar.bz2 | |
target/alpha: Hoist branch shift to initial decode
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240503072014.24751-3-philmd@linaro.org>
Diffstat (limited to 'target/alpha')
| -rw-r--r-- | target/alpha/translate.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target/alpha/translate.c b/target/alpha/translate.c index a97cd54..52c2e62 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -432,7 +432,7 @@ static bool use_goto_tb(DisasContext *ctx, uint64_t dest) static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) { - uint64_t dest = ctx->base.pc_next + (disp << 2); + uint64_t dest = ctx->base.pc_next + disp; if (ra != 31) { tcg_gen_movi_i64(ctx->ir[ra], ctx->base.pc_next); @@ -455,7 +455,7 @@ static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) static DisasJumpType gen_bcond_internal(DisasContext *ctx, TCGCond cond, TCGv cmp, uint64_t imm, int32_t disp) { - uint64_t dest = ctx->base.pc_next + (disp << 2); + uint64_t dest = ctx->base.pc_next + disp; TCGLabel *lab_true = gen_new_label(); if (use_goto_tb(ctx, dest)) { @@ -1382,7 +1382,7 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn) real_islit = islit = extract32(insn, 12, 1); lit = extract32(insn, 13, 8); - disp21 = sextract32(insn, 0, 21); + disp21 = sextract32(insn, 0, 21) * 4; disp16 = sextract32(insn, 0, 16); disp12 = sextract32(insn, 0, 12); |