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authorRichard Henderson <rth@twiddle.net>2015-08-29 12:59:29 -0700
committerRichard Henderson <rth@twiddle.net>2015-10-07 20:36:27 +1100
commit667b8e29c5b1d8c5b4e6ad5f780ca60914eb6e96 (patch)
tree0d1aa7775d9cb83ce858394f2e56114ccdc23f94 /target-tricore/translate.c
parent765b842adec4c5a359e69ca08785553599f71496 (diff)
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target-*: Unconditionally emit tcg_gen_insn_start
While we're at it, emit the opcode adjacent to where we currently record data for search_pc. This puts gen_io_start et al on the "correct" side of the marker. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tricore/translate.c')
-rw-r--r--target-tricore/translate.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 440f30a..27564d3 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -8292,6 +8292,8 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct TranslationBlock *tb,
tcg_clear_temp_count();
gen_tb_start(tb);
while (ctx.bstate == BS_NONE) {
+ tcg_gen_insn_start(ctx.pc);
+
ctx.opcode = cpu_ldl_code(env, ctx.pc);
decode_opc(env, &ctx, 0);