aboutsummaryrefslogtreecommitdiff
path: root/target-sparc
diff options
context:
space:
mode:
authorAvi Kivity <avi@redhat.com>2012-10-23 12:30:10 +0200
committerAnthony Liguori <aliguori@us.ibm.com>2012-10-23 08:58:25 -0500
commita8170e5e97ad17ca169c64ba87ae2f53850dab4c (patch)
tree51182ed444f0d2bf282f6bdacef43f32e5adaadf /target-sparc
parent50d2b4d93f45a425f15ac88bc4ec352f5c6e0bc2 (diff)
downloadqemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.zip
qemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.tar.gz
qemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.tar.bz2
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/cpu.h4
-rw-r--r--target-sparc/ldst_helper.c36
-rw-r--r--target-sparc/mmu_helper.c38
3 files changed, 39 insertions, 39 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 214d01d..a55fe08 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -583,10 +583,10 @@ static inline int tlb_compare_context(const SparcTLBEntry *tlb,
/* cpu-exec.c */
#if !defined(CONFIG_USER_ONLY)
-void cpu_unassigned_access(CPUSPARCState *env1, target_phys_addr_t addr,
+void cpu_unassigned_access(CPUSPARCState *env1, hwaddr addr,
int is_write, int is_exec, int is_asi, int size);
#if defined(TARGET_SPARC64)
-target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
+hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
int mmu_idx);
#endif
#endif
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 2ca9a5c..356144a 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -619,21 +619,21 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
case 0x21 ... 0x2f: /* MMU passthrough, 0x100000000 to 0xfffffffff */
switch (size) {
case 1:
- ret = ldub_phys((target_phys_addr_t)addr
- | ((target_phys_addr_t)(asi & 0xf) << 32));
+ ret = ldub_phys((hwaddr)addr
+ | ((hwaddr)(asi & 0xf) << 32));
break;
case 2:
- ret = lduw_phys((target_phys_addr_t)addr
- | ((target_phys_addr_t)(asi & 0xf) << 32));
+ ret = lduw_phys((hwaddr)addr
+ | ((hwaddr)(asi & 0xf) << 32));
break;
default:
case 4:
- ret = ldl_phys((target_phys_addr_t)addr
- | ((target_phys_addr_t)(asi & 0xf) << 32));
+ ret = ldl_phys((hwaddr)addr
+ | ((hwaddr)(asi & 0xf) << 32));
break;
case 8:
- ret = ldq_phys((target_phys_addr_t)addr
- | ((target_phys_addr_t)(asi & 0xf) << 32));
+ ret = ldq_phys((hwaddr)addr
+ | ((hwaddr)(asi & 0xf) << 32));
break;
}
break;
@@ -1015,21 +1015,21 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
{
switch (size) {
case 1:
- stb_phys((target_phys_addr_t)addr
- | ((target_phys_addr_t)(asi & 0xf) << 32), val);
+ stb_phys((hwaddr)addr
+ | ((hwaddr)(asi & 0xf) << 32), val);
break;
case 2:
- stw_phys((target_phys_addr_t)addr
- | ((target_phys_addr_t)(asi & 0xf) << 32), val);
+ stw_phys((hwaddr)addr
+ | ((hwaddr)(asi & 0xf) << 32), val);
break;
case 4:
default:
- stl_phys((target_phys_addr_t)addr
- | ((target_phys_addr_t)(asi & 0xf) << 32), val);
+ stl_phys((hwaddr)addr
+ | ((hwaddr)(asi & 0xf) << 32), val);
break;
case 8:
- stq_phys((target_phys_addr_t)addr
- | ((target_phys_addr_t)(asi & 0xf) << 32), val);
+ stq_phys((hwaddr)addr
+ | ((hwaddr)(asi & 0xf) << 32), val);
break;
}
}
@@ -2313,7 +2313,7 @@ void helper_stqf(CPUSPARCState *env, target_ulong addr, int mem_idx)
#if !defined(CONFIG_USER_ONLY)
#ifndef TARGET_SPARC64
-void cpu_unassigned_access(CPUSPARCState *env, target_phys_addr_t addr,
+void cpu_unassigned_access(CPUSPARCState *env, hwaddr addr,
int is_write, int is_exec, int is_asi, int size)
{
int fault_type;
@@ -2373,7 +2373,7 @@ void cpu_unassigned_access(CPUSPARCState *env, target_phys_addr_t addr,
}
}
#else
-void cpu_unassigned_access(CPUSPARCState *env, target_phys_addr_t addr,
+void cpu_unassigned_access(CPUSPARCState *env, hwaddr addr,
int is_write, int is_exec, int is_asi, int size)
{
#ifdef DEBUG_UNASSIGNED
diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c
index cb73c44..2c89b20 100644
--- a/target-sparc/mmu_helper.c
+++ b/target-sparc/mmu_helper.c
@@ -76,13 +76,13 @@ static const int perm_table[2][8] = {
}
};
-static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical,
+static int get_physical_address(CPUSPARCState *env, hwaddr *physical,
int *prot, int *access_index,
target_ulong address, int rw, int mmu_idx,
target_ulong *page_size)
{
int access_perms = 0;
- target_phys_addr_t pde_ptr;
+ hwaddr pde_ptr;
uint32_t pde;
int error_code = 0, is_dirty, is_user;
unsigned long page_offset;
@@ -192,7 +192,7 @@ static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical
/* Even if large ptes, we map only one 4KB page in the cache to
avoid filling it too fast */
- *physical = ((target_phys_addr_t)(pde & PTE_ADDR_MASK) << 4) + page_offset;
+ *physical = ((hwaddr)(pde & PTE_ADDR_MASK) << 4) + page_offset;
return error_code;
}
@@ -200,7 +200,7 @@ static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical
int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw,
int mmu_idx)
{
- target_phys_addr_t paddr;
+ hwaddr paddr;
target_ulong vaddr;
target_ulong page_size;
int error_code = 0, prot, access_index;
@@ -244,11 +244,11 @@ int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw,
target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev)
{
- target_phys_addr_t pde_ptr;
+ hwaddr pde_ptr;
uint32_t pde;
/* Context base + context number */
- pde_ptr = (target_phys_addr_t)(env->mmuregs[1] << 4) +
+ pde_ptr = (hwaddr)(env->mmuregs[1] << 4) +
(env->mmuregs[2] << 2);
pde = ldl_phys(pde_ptr);
@@ -312,13 +312,13 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env)
{
target_ulong va, va1, va2;
unsigned int n, m, o;
- target_phys_addr_t pde_ptr, pa;
+ hwaddr pde_ptr, pa;
uint32_t pde;
pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2);
pde = ldl_phys(pde_ptr);
(*cpu_fprintf)(f, "Root ptr: " TARGET_FMT_plx ", ctx: %d\n",
- (target_phys_addr_t)env->mmuregs[1] << 4, env->mmuregs[2]);
+ (hwaddr)env->mmuregs[1] << 4, env->mmuregs[2]);
for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) {
pde = mmu_probe(env, va, 2);
if (pde) {
@@ -431,7 +431,7 @@ int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr,
#else /* !TARGET_SPARC64 */
/* 41 bit physical address space */
-static inline target_phys_addr_t ultrasparc_truncate_physical(uint64_t x)
+static inline hwaddr ultrasparc_truncate_physical(uint64_t x)
{
return x & 0x1ffffffffffULL;
}
@@ -445,7 +445,7 @@ static inline target_phys_addr_t ultrasparc_truncate_physical(uint64_t x)
entry size */
static inline int ultrasparc_tag_match(SparcTLBEntry *tlb,
uint64_t address, uint64_t context,
- target_phys_addr_t *physical)
+ hwaddr *physical)
{
uint64_t mask;
@@ -478,7 +478,7 @@ static inline int ultrasparc_tag_match(SparcTLBEntry *tlb,
}
static int get_physical_address_data(CPUSPARCState *env,
- target_phys_addr_t *physical, int *prot,
+ hwaddr *physical, int *prot,
target_ulong address, int rw, int mmu_idx)
{
unsigned int i;
@@ -597,7 +597,7 @@ static int get_physical_address_data(CPUSPARCState *env,
}
static int get_physical_address_code(CPUSPARCState *env,
- target_phys_addr_t *physical, int *prot,
+ hwaddr *physical, int *prot,
target_ulong address, int mmu_idx)
{
unsigned int i;
@@ -665,7 +665,7 @@ static int get_physical_address_code(CPUSPARCState *env,
return 1;
}
-static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical,
+static int get_physical_address(CPUSPARCState *env, hwaddr *physical,
int *prot, int *access_index,
target_ulong address, int rw, int mmu_idx,
target_ulong *page_size)
@@ -703,7 +703,7 @@ int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw,
int mmu_idx)
{
target_ulong vaddr;
- target_phys_addr_t paddr;
+ hwaddr paddr;
target_ulong page_size;
int error_code = 0, prot, access_index;
@@ -810,7 +810,7 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env)
#endif /* TARGET_SPARC64 */
-static int cpu_sparc_get_phys_page(CPUSPARCState *env, target_phys_addr_t *phys,
+static int cpu_sparc_get_phys_page(CPUSPARCState *env, hwaddr *phys,
target_ulong addr, int rw, int mmu_idx)
{
target_ulong page_size;
@@ -821,10 +821,10 @@ static int cpu_sparc_get_phys_page(CPUSPARCState *env, target_phys_addr_t *phys,
}
#if defined(TARGET_SPARC64)
-target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
+hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
int mmu_idx)
{
- target_phys_addr_t phys_addr;
+ hwaddr phys_addr;
if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 4, mmu_idx) != 0) {
return -1;
@@ -833,9 +833,9 @@ target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong ad
}
#endif
-target_phys_addr_t cpu_get_phys_page_debug(CPUSPARCState *env, target_ulong addr)
+hwaddr cpu_get_phys_page_debug(CPUSPARCState *env, target_ulong addr)
{
- target_phys_addr_t phys_addr;
+ hwaddr phys_addr;
int mmu_idx = cpu_mmu_index(env);
MemoryRegionSection section;