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authorIgor Kovalenko <igor.v.kovalenko@gmail.com>2009-07-27 01:49:04 +0400
committerBlue Swirl <blauwirbel@gmail.com>2009-07-27 05:43:22 +0000
commit6e8e7d4c092951f417297120e3d3cc28840a045b (patch)
tree4051a100ff5bca5965d2bf07be3ebf8af8c91d19 /target-sparc/cpu.h
parent33b544ba5c78c656cef6f34880cd3670d170a83f (diff)
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sparc64 name mmu registers and general cleanup
- add names to mmu registers, this helps understanding the code which uses/modifies them. - fold i/d mmu tlb entries tag and tte arrays into arrays of tlb entries - extract demap_tlb routine (code duplication) - extract replace_tlb routine (code duplication) - flush qemu tlb translations when replacing sparc64 mmu tlb entries I have no test case which demands flushing qemu translations, and this patch should have no other visible changes to runtime. Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
Diffstat (limited to 'target-sparc/cpu.h')
-rw-r--r--target-sparc/cpu.h38
1 files changed, 32 insertions, 6 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 76e1e79..98c185f 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -273,6 +273,11 @@ enum {
};
#endif
+typedef struct SparcTLBEntry {
+ uint64_t tag;
+ uint64_t tte;
+} SparcTLBEntry;
+
typedef struct CPUSPARCState {
target_ulong gregs[8]; /* general registers */
target_ulong *regwptr; /* pointer to current register window */
@@ -319,12 +324,33 @@ typedef struct CPUSPARCState {
uint64_t lsu;
#define DMMU_E 0x8
#define IMMU_E 0x4
- uint64_t immuregs[16];
- uint64_t dmmuregs[16];
- uint64_t itlb_tag[64];
- uint64_t itlb_tte[64];
- uint64_t dtlb_tag[64];
- uint64_t dtlb_tte[64];
+ //typedef struct SparcMMU
+ union {
+ uint64_t immuregs[16];
+ struct {
+ uint64_t tsb_tag_target;
+ uint64_t unused_mmu_primary_context; // use DMMU
+ uint64_t unused_mmu_secondary_context; // use DMMU
+ uint64_t sfsr;
+ uint64_t sfar;
+ uint64_t tsb;
+ uint64_t tag_access;
+ } immu;
+ };
+ union {
+ uint64_t dmmuregs[16];
+ struct {
+ uint64_t tsb_tag_target;
+ uint64_t mmu_primary_context;
+ uint64_t mmu_secondary_context;
+ uint64_t sfsr;
+ uint64_t sfar;
+ uint64_t tsb;
+ uint64_t tag_access;
+ } dmmu;
+ };
+ SparcTLBEntry itlb[64];
+ SparcTLBEntry dtlb[64];
uint32_t mmu_version;
#else
uint32_t mmuregs[32];