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| author | Alexandre Courbot <gnurou@gmail.com> | 2010-07-12 14:05:31 +0900 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2010-07-12 10:20:29 +0200 |
| commit | 8e9b06787bd31b5acfbcbc4b29832d73c25852fb (patch) | |
| tree | d207eae992f7866bb4b3207c3cd835f69ec50853 /target-sh4 | |
| parent | 1ddda5cd364d2f82201830ca69675e17c60ded8e (diff) | |
| download | qemu-8e9b06787bd31b5acfbcbc4b29832d73c25852fb.zip qemu-8e9b06787bd31b5acfbcbc4b29832d73c25852fb.tar.gz qemu-8e9b06787bd31b5acfbcbc4b29832d73c25852fb.tar.bz2 | |
target-sh4: Split the LDST macro into 2 sub-macros
The LDST macro is used to generate ldc and stc instructions that work with a
specific register. However, the SGR register only supports stc up to SH4A,
which supports both stc and ldc. This patch creates two sub-macros named LD
and ST that handle generating ldc and stc instructions separately, and
redeclares LDST to use these sub-macro.
Signed-off-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-sh4')
| -rw-r--r-- | target-sh4/translate.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/target-sh4/translate.c b/target-sh4/translate.c index d0d6c00..3abafd0 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1511,7 +1511,7 @@ static void _decode_opc(DisasContext * ctx) tcg_temp_free(addr); } return; -#define LDST(reg,ldnum,ldpnum,stnum,stpnum,prechk) \ +#define LD(reg,ldnum,ldpnum,prechk) \ case ldnum: \ prechk \ tcg_gen_mov_i32 (cpu_##reg, REG(B11_8)); \ @@ -1520,7 +1520,8 @@ static void _decode_opc(DisasContext * ctx) prechk \ tcg_gen_qemu_ld32s (cpu_##reg, REG(B11_8), ctx->memidx); \ tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4); \ - return; \ + return; +#define ST(reg,stnum,stpnum,prechk) \ case stnum: \ prechk \ tcg_gen_mov_i32 (REG(B11_8), cpu_##reg); \ @@ -1535,6 +1536,9 @@ static void _decode_opc(DisasContext * ctx) tcg_temp_free(addr); \ } \ return; +#define LDST(reg,ldnum,ldpnum,stnum,stpnum,prechk) \ + LD(reg,ldnum,ldpnum,prechk) \ + ST(reg,stnum,stpnum,prechk) LDST(gbr, 0x401e, 0x4017, 0x0012, 0x4013, {}) LDST(vbr, 0x402e, 0x4027, 0x0022, 0x4023, CHECK_PRIVILEGED) LDST(ssr, 0x403e, 0x4037, 0x0032, 0x4033, CHECK_PRIVILEGED) |