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authorDavid Hildenbrand <dahi@linux.vnet.ibm.com>2016-09-05 10:52:20 +0200
committerCornelia Huck <cornelia.huck@de.ibm.com>2016-09-06 17:06:49 +0200
commit90229ebbad508ba604f215e90c7c5cc0fbc3559a (patch)
tree05d28e3f69733081f49d047897a6412a587d3c94 /target-s390x
parentdced7eec3c60154408296dda8641ecc54978f5d6 (diff)
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s390x/cpumodel: generate CPU feature group lists
Feature groups will be very helpful to reduce the amount of features typically available in sane configurations. E.g. the MSA facilities introduced loads of subfunctions, which could - in theory - go away in the future, but we want to avoid reporting hundrets of features to the user if usually all of them are in place. Groups only contain features that were introduced in one shot, not just random features. Therefore, groups can never change. This is an important property regarding migration. Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Message-Id: <20160905085244.99980-7-dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Diffstat (limited to 'target-s390x')
-rw-r--r--target-s390x/gen-features.c80
1 files changed, 80 insertions, 0 deletions
diff --git a/target-s390x/gen-features.c b/target-s390x/gen-features.c
index 8f02c29..dfc7659 100644
--- a/target-s390x/gen-features.c
+++ b/target-s390x/gen-features.c
@@ -182,6 +182,35 @@
S390_FEAT_MSA_EXT_5, \
S390_FEAT_PPNO_SHA_512_DRNG
+/* cpu feature groups */
+static uint16_t group_PLO[] = {
+ S390_FEAT_GROUP_PLO,
+};
+static uint16_t group_TOD_CLOCK_STEERING[] = {
+ S390_FEAT_GROUP_TOD_CLOCK_STEERING,
+};
+static uint16_t group_GEN13_PTFF[] = {
+ S390_FEAT_GROUP_GEN13_PTFF,
+};
+static uint16_t group_MSA[] = {
+ S390_FEAT_GROUP_MSA,
+};
+static uint16_t group_MSA_EXT_1[] = {
+ S390_FEAT_GROUP_MSA_EXT_1,
+};
+static uint16_t group_MSA_EXT_2[] = {
+ S390_FEAT_GROUP_MSA_EXT_2,
+};
+static uint16_t group_MSA_EXT_3[] = {
+ S390_FEAT_GROUP_MSA_EXT_3,
+};
+static uint16_t group_MSA_EXT_4[] = {
+ S390_FEAT_GROUP_MSA_EXT_4,
+};
+static uint16_t group_MSA_EXT_5[] = {
+ S390_FEAT_GROUP_MSA_EXT_5,
+};
+
/* base features in order of release */
static uint16_t base_GEN7_GA1[] = {
S390_FEAT_GROUP_PLO,
@@ -435,6 +464,34 @@ static CpuFeatDefSpec CpuFeatDef[] = {
CPU_FEAT_INITIALIZER(GEN13_GA2),
};
+#define FEAT_GROUP_INITIALIZER(_name) \
+ { \
+ .name = "S390_FEAT_GROUP_LIST_" #_name, \
+ .bits = \
+ { .data = group_##_name, \
+ .len = ARRAY_SIZE(group_##_name) }, \
+ }
+
+typedef struct {
+ const char *name;
+ BitSpec bits;
+} FeatGroupDefSpec;
+
+/*******************************
+ * feature groups
+ *******************************/
+static FeatGroupDefSpec FeatGroupDef[] = {
+ FEAT_GROUP_INITIALIZER(PLO),
+ FEAT_GROUP_INITIALIZER(TOD_CLOCK_STEERING),
+ FEAT_GROUP_INITIALIZER(GEN13_PTFF),
+ FEAT_GROUP_INITIALIZER(MSA),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_1),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_2),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_3),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_4),
+ FEAT_GROUP_INITIALIZER(MSA_EXT_5),
+};
+
static void set_bits(uint64_t list[], BitSpec bits)
{
uint32_t i;
@@ -492,6 +549,28 @@ static void print_feature_defs(void)
}
}
+static void print_feature_group_defs(void)
+{
+ int i, j;
+
+ printf("\n/* CPU feature group list data */\n");
+
+ for (i = 0; i < ARRAY_SIZE(FeatGroupDef); i++) {
+ uint64_t feat[S390_FEAT_MAX / 64 + 1] = {};
+
+ set_bits(feat, FeatGroupDef[i].bits);
+ printf("#define %s\t", FeatGroupDef[i].name);
+ for (j = 0; j < ARRAY_SIZE(feat); j++) {
+ printf("0x%016"PRIx64"ULL", feat[j]);
+ if (j < ARRAY_SIZE(feat) - 1) {
+ printf(",");
+ } else {
+ printf("\n");
+ }
+ }
+ }
+}
+
int main(int argc, char *argv[])
{
printf("/*\n"
@@ -506,6 +585,7 @@ int main(int argc, char *argv[])
" */\n\n"
"#ifndef %s\n#define %s\n", __FILE__, _YEARS, _NAME_H, _NAME_H);
print_feature_defs();
+ print_feature_group_defs();
printf("\n#endif\n");
return 0;
}