diff options
| author | Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> | 2016-07-26 17:28:34 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-09-07 09:52:14 +1000 |
| commit | 082ce33005d81ff45b929e826ac48a5696059efc (patch) | |
| tree | 5a878f045addc781c844003ef21ee0bd63e451eb /target-ppc | |
| parent | b35344e4a0968fd1341ec1c1ed2e6b5c0d851542 (diff) | |
| download | qemu-082ce33005d81ff45b929e826ac48a5696059efc.zip qemu-082ce33005d81ff45b929e826ac48a5696059efc.tar.gz qemu-082ce33005d81ff45b929e826ac48a5696059efc.tar.bz2 | |
target-ppc: add cmpeqb instruction
Search a byte in the stream of 8bytes provided in the register
Suggested-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/helper.h | 1 | ||||
| -rw-r--r-- | target-ppc/int_helper.c | 22 | ||||
| -rw-r--r-- | target-ppc/translate.c | 12 |
3 files changed, 35 insertions, 0 deletions
diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 9c79808..9e4bb7b 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -44,6 +44,7 @@ DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl) DEF_HELPER_3(sraw, tl, env, tl, tl) #if defined(TARGET_PPC64) +DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl) DEF_HELPER_FLAGS_1(cntlzd, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_1(cnttzd, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_1(popcntd, TCG_CALL_NO_RWG_SE, tl, tl) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index 02b6df3..15947ad 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -151,6 +151,28 @@ target_ulong helper_cnttzw(target_ulong t) } #if defined(TARGET_PPC64) +/* if x = 0xab, returns 0xababababababababa */ +#define pattern(x) (((x) & 0xff) * (~(target_ulong)0 / 0xff)) + +/* substract 1 from each byte, and with inverse, check if MSB is set at each + * byte. + * i.e. ((0x00 - 0x01) & ~(0x00)) & 0x80 + * (0xFF & 0xFF) & 0x80 = 0x80 (zero found) + */ +#define haszero(v) (((v) - pattern(0x01)) & ~(v) & pattern(0x80)) + +/* When you XOR the pattern and there is a match, that byte will be zero */ +#define hasvalue(x, n) (haszero((x) ^ pattern(n))) + +uint32_t helper_cmpeqb(target_ulong ra, target_ulong rb) +{ + return hasvalue(rb, ra) ? 1 << CRF_GT : 0; +} + +#undef pattern +#undef haszero +#undef hasvalue + target_ulong helper_cntlzd(target_ulong t) { return clz64(t); diff --git a/target-ppc/translate.c b/target-ppc/translate.c index b248453..dd2ce58 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -855,6 +855,15 @@ static void gen_cmprb(DisasContext *ctx) tcg_temp_free_i32(src2hi); } +#if defined(TARGET_PPC64) +/* cmpeqb */ +static void gen_cmpeqb(DisasContext *ctx) +{ + gen_helper_cmpeqb(cpu_crf[crfD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], + cpu_gpr[rB(ctx->opcode)]); +} +#endif + /* isel (PowerPC 2.03 specification) */ static void gen_isel(DisasContext *ctx) { @@ -10045,6 +10054,9 @@ GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER), GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER), GEN_HANDLER(cmpl, 0x1F, 0x00, 0x01, 0x00400000, PPC_INTEGER), GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER), +#if defined(TARGET_PPC64) +GEN_HANDLER_E(cmpeqb, 0x1F, 0x00, 0x07, 0x00600000, PPC_NONE, PPC2_ISA300), +#endif GEN_HANDLER_E(cmpb, 0x1F, 0x1C, 0x0F, 0x00000001, PPC_NONE, PPC2_ISA205), GEN_HANDLER_E(cmprb, 0x1F, 0x00, 0x06, 0x00400001, PPC_NONE, PPC2_ISA300), GEN_HANDLER(isel, 0x1F, 0x0F, 0xFF, 0x00000001, PPC_ISEL), |