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author | Alexander Graf <agraf@suse.de> | 2014-05-11 18:37:00 +0200 |
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committer | Alexander Graf <agraf@suse.de> | 2014-06-16 13:24:33 +0200 |
commit | 08215d8fd8ca15425401adc9e01361cbc6882402 (patch) | |
tree | 4b48cf5232f63e81799c4a2b03873d0c580f9225 /target-ppc/kvm.c | |
parent | c15424531f2406cf5ad9f02d35204fac98601696 (diff) | |
download | qemu-08215d8fd8ca15425401adc9e01361cbc6882402.zip qemu-08215d8fd8ca15425401adc9e01361cbc6882402.tar.gz qemu-08215d8fd8ca15425401adc9e01361cbc6882402.tar.bz2 |
KVM: PPC: Don't secretly add 1T segment feature to CPU
When we select a CPU type that does not support 1TB segments, we should
not expose 1TB just because KVM supports 1TB segments. User configuration
always wins over feature availability.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/kvm.c')
-rw-r--r-- | target-ppc/kvm.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c index 3569367..0744f51 100644 --- a/target-ppc/kvm.c +++ b/target-ppc/kvm.c @@ -356,6 +356,10 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu) /* Convert to QEMU form */ memset(&env->sps, 0, sizeof(env->sps)); + /* + * XXX This loop should be an entry wide AND of the capabilities that + * the selected CPU has with the capabilities that KVM supports. + */ for (ik = iq = 0; ik < KVM_PPC_PAGE_SIZES_MAX_SZ; ik++) { struct ppc_one_seg_page_size *qsps = &env->sps.sps[iq]; struct kvm_ppc_one_seg_page_size *ksps = &smmu_info.sps[ik]; @@ -382,9 +386,7 @@ static void kvm_fixup_page_sizes(PowerPCCPU *cpu) } } env->slb_nr = smmu_info.slb_size; - if (smmu_info.flags & KVM_PPC_1T_SEGMENTS) { - env->mmu_model |= POWERPC_MMU_1TSEG; - } else { + if (!(smmu_info.flags & KVM_PPC_1T_SEGMENTS)) { env->mmu_model &= ~POWERPC_MMU_1TSEG; } } |