aboutsummaryrefslogtreecommitdiff
path: root/target-openrisc
diff options
context:
space:
mode:
authorRichard Henderson <rth@twiddle.net>2015-09-17 15:58:10 -0700
committerRichard Henderson <rth@twiddle.net>2015-10-07 20:36:28 +1100
commitb933066ae03d924a92b2616b4a24e7d91cd5b841 (patch)
treea5475afc2a27a25b4f91c8376d68daec05183e2e /target-openrisc
parent959082fc4a93a016a6b697e1e0c2b373d8a3a373 (diff)
downloadqemu-b933066ae03d924a92b2616b4a24e7d91cd5b841.zip
qemu-b933066ae03d924a92b2616b4a24e7d91cd5b841.tar.gz
qemu-b933066ae03d924a92b2616b4a24e7d91cd5b841.tar.bz2
target-*: Introduce and use cpu_breakpoint_test
Reduce the boilerplate required for each target. At the same time, move the test for breakpoint after calling tcg_gen_insn_start. Note that arm and aarch64 do not use cpu_breakpoint_test, but still move the inline test down after tcg_gen_insn_start. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-openrisc')
-rw-r--r--target-openrisc/translate.c24
1 files changed, 7 insertions, 17 deletions
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index f9b4ed5..9755850 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -1618,22 +1618,6 @@ static void disas_openrisc_insn(DisasContext *dc, OpenRISCCPU *cpu)
}
}
-static void check_breakpoint(OpenRISCCPU *cpu, DisasContext *dc)
-{
- CPUState *cs = CPU(cpu);
- CPUBreakpoint *bp;
-
- if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
- QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
- if (bp->pc == dc->pc) {
- tcg_gen_movi_tl(cpu_pc, dc->pc);
- gen_exception(dc, EXCP_DEBUG);
- dc->is_jmp = DISAS_UPDATE;
- }
- }
- }
-}
-
static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
TranslationBlock *tb,
int search_pc)
@@ -1674,7 +1658,6 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
gen_tb_start(tb);
do {
- check_breakpoint(cpu, dc);
if (search_pc) {
j = tcg_op_buf_count();
if (k < j) {
@@ -1690,6 +1673,13 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
tcg_gen_insn_start(dc->pc);
num_insns++;
+ if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
+ tcg_gen_movi_tl(cpu_pc, dc->pc);
+ gen_exception(dc, EXCP_DEBUG);
+ dc->is_jmp = DISAS_UPDATE;
+ break;
+ }
+
if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {
gen_io_start();
}