Merge remote-tracking branch 'remotes/rth/tcg-next' into staging

* remotes/rth/tcg-next:
  tcg/optimize: Remember garbage high bits for 32-bit ops
  tcg/optimize: Move updating of gen_opc_buf into tcg_opt_gen_mov*
  tcg-sparc: Make debug_frame const
  tcg-s390: Make debug_frame const
  tcg-arm: Make debug_frame const
  tcg-aarch64: Make debug_frame const
  tcg-i386: Make debug_frame const
  tcg: Allow the debug_frame data structure to be constant
  tcg: Move size effects out of dh_arg
  tcg: Remove sizemask and flags arguments to tcg_gen_callN
  tcg: Save flags and computed sizemask in TCGHelperInfo
  tcg: Register the helper info struct rather than the name
  tcg: Move side effects out of dh_sizemask
  tcg: Inline tcg_gen_helperN
  tcg: Use helper-gen.h in tcg-op.h
  tcg: Push tcg-runtime routines into exec/helper-*
  tcg: Invert the inclusion of helper.h
  tcg: Optimize brcond2 and setcond2 ne/eq

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

7 files changed, 7 insertions, 12 deletions

diff --git a/target-openrisc/exception_helper.c b/target-openrisc/exception_helper.c
index 0c53b77..6093953 100644
--- a/target-openrisc/exception_helper.c
+++ b/target-openrisc/exception_helper.c
@@ -18,7 +18,7 @@
  */
 
 #include "cpu.h"
-#include "helper.h"
+#include "exec/helper-proto.h"
 #include "exception.h"
 
 void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp)
diff --git a/target-openrisc/fpu_helper.c b/target-openrisc/fpu_helper.c
index 4615a36..c94ed35 100644
--- a/target-openrisc/fpu_helper.c
+++ b/target-openrisc/fpu_helper.c
@@ -19,7 +19,7 @@
  */
 
 #include "cpu.h"
-#include "helper.h"
+#include "exec/helper-proto.h"
 #include "exception.h"
 
 static inline uint32_t ieee_ex_to_openrisc(OpenRISCCPU *cpu, int fexcp)
diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h
index 2af9790..f53fa21 100644
--- a/target-openrisc/helper.h
+++ b/target-openrisc/helper.h
@@ -17,8 +17,6 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#include "exec/def-helper.h"
-
 /* exception */
 DEF_HELPER_FLAGS_2(exception, 0, void, env, i32)
 
@@ -66,5 +64,3 @@ DEF_HELPER_FLAGS_1(rfe, 0, void, env)
 /* sys */
 DEF_HELPER_FLAGS_4(mtspr, 0, void, env, tl, tl, tl)
 DEF_HELPER_FLAGS_4(mfspr, 0, tl, env, tl, tl, tl)
-
-#include "exec/def-helper.h"
diff --git a/target-openrisc/int_helper.c b/target-openrisc/int_helper.c
index 16cb5ab..6e27aeb 100644
--- a/target-openrisc/int_helper.c
+++ b/target-openrisc/int_helper.c
@@ -19,7 +19,7 @@
  */
 
 #include "cpu.h"
-#include "helper.h"
+#include "exec/helper-proto.h"
 #include "exception.h"
 #include "qemu/host-utils.h"
 
diff --git a/target-openrisc/interrupt_helper.c b/target-openrisc/interrupt_helper.c
index 8194057..55a780c 100644
--- a/target-openrisc/interrupt_helper.c
+++ b/target-openrisc/interrupt_helper.c
@@ -19,7 +19,7 @@
  */
 
 #include "cpu.h"
-#include "helper.h"
+#include "exec/helper-proto.h"
 
 void HELPER(rfe)(CPUOpenRISCState *env)
 {
diff --git a/target-openrisc/sys_helper.c b/target-openrisc/sys_helper.c
index fedcbed..53ca6bc 100644
--- a/target-openrisc/sys_helper.c
+++ b/target-openrisc/sys_helper.c
@@ -19,7 +19,7 @@
  */
 
 #include "cpu.h"
-#include "helper.h"
+#include "exec/helper-proto.h"
 
 #define TO_SPR(group, number) (((group) << 11) + (number))
 
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 852b5e6..40084f9 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -27,9 +27,8 @@
 #include "config.h"
 #include "qemu/bitops.h"
 
-#include "helper.h"
-#define GEN_HELPER 1
-#include "helper.h"
+#include "exec/helper-proto.h"
+#include "exec/helper-gen.h"
 
 #define OPENRISC_DISAS