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author | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2013-10-23 16:54:31 +0200 |
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committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2013-10-24 22:32:56 +0200 |
commit | 11a7621763e7c91fef5169942a90e30bfd66a837 (patch) | |
tree | f83e7a0882d5f9f696ada55c71210dfe04493ade /target-microblaze | |
parent | 4a536270454cc6e59960857a4e4a7c1ebb7fdd4b (diff) | |
download | qemu-11a7621763e7c91fef5169942a90e30bfd66a837.zip qemu-11a7621763e7c91fef5169942a90e30bfd66a837.tar.gz qemu-11a7621763e7c91fef5169942a90e30bfd66a837.tar.bz2 |
microblaze: At swx, check that the reserved word is unmodified
This improves the reservation check for system emulation, making
it possible to catch stores that modify reserved word.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-microblaze')
-rw-r--r-- | target-microblaze/cpu.h | 1 | ||||
-rw-r--r-- | target-microblaze/translate.c | 16 |
2 files changed, 17 insertions, 0 deletions
diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index 7508cf5..e1415f0 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -246,6 +246,7 @@ struct CPUMBState { /* lwx/swx reserved address */ #define RES_ADDR_NONE 0xffffffff /* Use 0xffffffff to indicate no reservation */ uint32_t res_addr; + uint32_t res_val; /* Internal flags. */ #define IMM_FLAG 4 diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 57627fc..9edcb67 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -50,6 +50,7 @@ static TCGv env_btaken; static TCGv env_btarget; static TCGv env_iflags; static TCGv env_res_addr; +static TCGv env_res_val; #include "exec/gen-icount.h" @@ -879,6 +880,7 @@ static inline void gen_load(DisasContext *dc, TCGv dst, TCGv addr, if (exclusive) { tcg_gen_mov_tl(env_res_addr, addr); + tcg_gen_mov_tl(env_res_val, dst); } } @@ -1128,6 +1130,7 @@ static void dec_store(DisasContext *dc) swx_addr = tcg_temp_local_new(); if (ex) { /* swx */ + TCGv tval; /* Force addr into the swx_addr. */ tcg_gen_mov_tl(swx_addr, *addr); @@ -1138,7 +1141,17 @@ static void dec_store(DisasContext *dc) write_carryi(dc, 1); swx_skip = gen_new_label(); tcg_gen_brcond_tl(TCG_COND_NE, env_res_addr, swx_addr, swx_skip); + + /* Compare the value loaded at lwx with current contents of + the reserved location. + FIXME: This only works for system emulation where we can expect + this compare and the following write to be atomic. For user + emulation we need to add atomicity between threads. */ + tval = tcg_temp_new(); + gen_load(dc, tval, swx_addr, 4, false); + tcg_gen_brcond_tl(TCG_COND_NE, env_res_val, tval, swx_skip); write_carryi(dc, 0); + tcg_temp_free(tval); } if (rev && size != 4) { @@ -2009,6 +2022,9 @@ void mb_tcg_init(void) env_res_addr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUMBState, res_addr), "res_addr"); + env_res_val = tcg_global_mem_new(TCG_AREG0, + offsetof(CPUMBState, res_val), + "res_val"); for (i = 0; i < ARRAY_SIZE(cpu_R); i++) { cpu_R[i] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUMBState, regs[i]), |