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authorPeter Maydell <peter.maydell@linaro.org>2014-09-12 14:06:49 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-09-12 14:06:49 +0100
commit17a9eb53a9bd226c3352f8d55b6f2383e0f74ff9 (patch)
tree73cdccf7b34424229aa70d012e982dc6d2a07a8b /target-arm/helper.c
parent16a906fd6ebbe894d8545ba6168cabea5ef49b1d (diff)
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target-arm: Remove comment about MDSCR_EL1 being dummy implementation
MDSCR_EL1 has actual functionality now; remove the out of date comment that claims it is a dummy implementation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 30d8e60..fc6a6f8 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2244,9 +2244,7 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {
.access = PL1_R, .type = ARM_CP_CONST, .resetvalue = 0 },
{ .name = "DBGDSAR", .cp = 14, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 0,
.access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 },
- /* Dummy implementation of monitor debug system control register:
- * we don't support debug. (The 32-bit alias is DBGDSCRext.)
- */
+ /* Monitor debug system control register; the 32-bit alias is DBGDSCRext. */
{ .name = "MDSCR_EL1", .state = ARM_CP_STATE_BOTH,
.cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
.access = PL1_RW,