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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-09-29 18:48:51 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-09-29 18:48:51 +0100
commit136e67e9b50b61fb03fedcea5c4fbe74cf44fdcc (patch)
tree8cd9d19801d0fe9bc0d8658b018af55bc28bacbe /target-arm/helper-a64.c
parent041c96666d0480380e50fe66fc66cc35bddcf741 (diff)
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target-arm: Add support for VIRQ and VFIQ
This only implements the external delivery method via the GIC. Acked-by: Greg Bellows <greg.bellows@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1411718914-6608-12-git-send-email-edgar.iglesias@gmail.com [PMM: adjusted following cpu-exec refactoring] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper-a64.c')
-rw-r--r--target-arm/helper-a64.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index 0011488..8228e29 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -482,9 +482,11 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
env->cp15.esr_el[new_el] = env->exception.syndrome;
break;
case EXCP_IRQ:
+ case EXCP_VIRQ:
addr += 0x80;
break;
case EXCP_FIQ:
+ case EXCP_VFIQ:
addr += 0x100;
break;
default: