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| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-02-07 23:10:07 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-02-07 23:10:07 +0000 |
| commit | b8a9e8f1336492798107a8704c22c4e8053c3dd7 (patch) | |
| tree | b1f675a1121e9c679a62d4f7d9c2e65baddea220 /target-arm/cpu.h | |
| parent | 4955a2cd1600344081e0b618d96c3b29942f76ef (diff) | |
| download | qemu-b8a9e8f1336492798107a8704c22c4e8053c3dd7.zip qemu-b8a9e8f1336492798107a8704c22c4e8053c3dd7.tar.gz qemu-b8a9e8f1336492798107a8704c22c4e8053c3dd7.tar.bz2 | |
initial user mmu support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1270 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index d754512..c0994c0 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -24,8 +24,10 @@ #include "cpu-defs.h" -#define EXCP_UDEF 1 /* undefined instruction */ -#define EXCP_SWI 2 /* software interrupt */ +#define EXCP_UDEF 1 /* undefined instruction */ +#define EXCP_SWI 2 /* software interrupt */ +#define EXCP_PREFETCH_ABORT 3 +#define EXCP_DATA_ABORT 4 typedef struct CPUARMState { uint32_t regs[16]; @@ -39,6 +41,9 @@ typedef struct CPUARMState { int thumb; /* 0 = arm mode, 1 = thumb mode */ + /* coprocessor 15 (MMU) status */ + uint32_t cp15_6; + /* exception/interrupt handling */ jmp_buf jmp_env; int exception_index; |