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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-04-15 19:18:44 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 21:34:04 +0100 |
| commit | a50c0f51339ed1df0a2e289513e3e2bf5b5ca45c (patch) | |
| tree | 21ccde90de2f8ff2c25e6c3fd617da9233b9ca88 /target-arm/cpu.c | |
| parent | 52e60cdd342dc48116edb81b443ba8c0a0c6f1a3 (diff) | |
| download | qemu-a50c0f51339ed1df0a2e289513e3e2bf5b5ca45c.zip qemu-a50c0f51339ed1df0a2e289513e3e2bf5b5ca45c.tar.gz qemu-a50c0f51339ed1df0a2e289513e3e2bf5b5ca45c.tar.bz2 | |
target-arm: Implement ARMv8 MVFR registers
For ARMv8 there are two changes to the MVFR media feature registers:
* there is a new MVFR2 which is accessible from 32 bit code
* 64 bit code accesses these via the usual sysreg instructions
rather than with a floating-point specific instruction
Implement this.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'target-arm/cpu.c')
| -rw-r--r-- | target-arm/cpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index a3c7492..a78a36b 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -88,6 +88,7 @@ static void arm_cpu_reset(CPUState *s) env->vfp.xregs[ARM_VFP_FPSID] = cpu->reset_fpsid; env->vfp.xregs[ARM_VFP_MVFR0] = cpu->mvfr0; env->vfp.xregs[ARM_VFP_MVFR1] = cpu->mvfr1; + env->vfp.xregs[ARM_VFP_MVFR2] = cpu->mvfr2; if (arm_feature(env, ARM_FEATURE_IWMMXT)) { env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q'; |