aboutsummaryrefslogtreecommitdiff
path: root/target-arm/cpu.c
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2014-04-15 19:18:48 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-04-17 21:34:06 +0100
commit3933443e38f37576d63247a846ca342da53e7d43 (patch)
tree5dec05752805f6af715c8ff296cac458831c28c1 /target-arm/cpu.c
parent19525524a755a98f72b80c92c4f6bdeea3002da5 (diff)
downloadqemu-3933443e38f37576d63247a846ca342da53e7d43.zip
qemu-3933443e38f37576d63247a846ca342da53e7d43.tar.gz
qemu-3933443e38f37576d63247a846ca342da53e7d43.tar.bz2
target-arm: Implement RVBAR register
Implement the AArch64 RVBAR register, which indicates the reset address. Since the reset address is implementation defined and usually configurable by setting config signals in hardware, we also provide a QOM property so it can be set at board level if necessary. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'target-arm/cpu.c')
-rw-r--r--target-arm/cpu.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index a78a36b..783fc73 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -105,6 +105,7 @@ static void arm_cpu_reset(CPUState *s)
env->cp15.c1_coproc = deposit64(env->cp15.c1_coproc, 20, 2, 3);
#else
env->pstate = PSTATE_MODE_EL1h;
+ env->pc = cpu->rvbar;
#endif
} else {
#if defined(CONFIG_USER_ONLY)
@@ -266,6 +267,9 @@ static Property arm_cpu_reset_cbar_property =
static Property arm_cpu_reset_hivecs_property =
DEFINE_PROP_BOOL("reset-hivecs", ARMCPU, reset_hivecs, false);
+static Property arm_cpu_rvbar_property =
+ DEFINE_PROP_UINT64("rvbar", ARMCPU, rvbar, 0);
+
static void arm_cpu_post_init(Object *obj)
{
ARMCPU *cpu = ARM_CPU(obj);
@@ -279,6 +283,11 @@ static void arm_cpu_post_init(Object *obj)
qdev_property_add_static(DEVICE(obj), &arm_cpu_reset_hivecs_property,
&error_abort);
}
+
+ if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
+ qdev_property_add_static(DEVICE(obj), &arm_cpu_rvbar_property,
+ &error_abort);
+ }
}
static void arm_cpu_finalizefn(Object *obj)