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| author | Frederic Barrat <fbarrat@linux.ibm.com> | 2024-07-24 16:21:23 -0500 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-07-26 09:51:33 +1000 |
| commit | d6d5f5c0347b124319ff9c0a43358bdae1d7ea26 (patch) | |
| tree | 6368b4f9cbd94374dbfbe069f11bac4a3f6dd5c2 /system/arch_init.c | |
| parent | 76125c0132f27f0b4ba1b71d19027aba1fe62fd9 (diff) | |
| download | qemu-d6d5f5c0347b124319ff9c0a43358bdae1d7ea26.zip qemu-d6d5f5c0347b124319ff9c0a43358bdae1d7ea26.tar.gz qemu-d6d5f5c0347b124319ff9c0a43358bdae1d7ea26.tar.bz2 | |
pnv/xive2: Add NVG and NVC to cache watch facility
The cache watch facility uses the same register interface to handle
entries in the NVP, NVG and NVC tables. A bit-field in the 'watchX
specification' register tells the table type. So far, that bit-field
was not read and the code assumed a read/write to the NVP table.
This patch allows to read/write entries in the NVG and NVC table as
well.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Michael Kowal <kowal@linux.vnet.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'system/arch_init.c')
0 files changed, 0 insertions, 0 deletions