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authorStefan Hajnoczi <stefanha@redhat.com>2025-03-16 02:45:12 -0400
committerStefan Hajnoczi <stefanha@redhat.com>2025-03-16 02:45:12 -0400
commit5719376f17b9ea6420603f7962e644eeb3e62cc1 (patch)
tree52de7f71fa758dd87b916e692d1f6a2a9eaaa65c /subprojects/arbitrary-int-1-rs.wrap
parent9beccc2df03026dc2979f0f28b8ff952e356164e (diff)
parenta019e15edfd62beae1e2f6adc0fa7415ba20b14c (diff)
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Merge tag 'pull-target-arm-20250314-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Correctly handle corner cases of guest attempting an exception return to AArch32 when target EL is AArch64 only * MAINTAINERS: Fix status for Arm boards I "maintain" * tests/functional: Bump up arm_replay timeout * Revert "hw/char/pl011: Warn when using disabled receiver" * util/cacheflush: Make first DSB unconditional on aarch64 * target/arm: Fix SVE/SME access check logic * meson.build: Set RUST_BACKTRACE for all tests # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmfULAUZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3gMKD/9GwpPo5/q2VAsJ/e+4JcGM # 5P8+lnt/tA5A2sA3Gl5o8v1LN5zm9CvyzHSlQSnvXygXlUP5e6vkwKQ8/DGZogjL # L0wRGOqGyNWapT9sulwsKzLXlG+9GCKeLbKq8wC9mUnviQ+FxTz2IxDexJedw0pS # NrLN55RSQO3OIEGt2fqIXKG+421/TfDPx998cwA4vyIgqZY1ZtHE2BvJNfatpSAc # Y6Rdq/BqWc0Tx0BAL7RgEl86OFO6YskbJwPbT6t/2KRBrqDbeuaHrynOzfA1Wbqx # RIvYqPuFg/ncziU7a2ZJLi4JvfSNO2RTH6KyDbq8WXqB5f7x59QuwXtfsEgmQK/T # 9JkC1G2R9RWezRmVygc7pImIpkMmSs12nhiij3OTmsTCSHB/qQJ8jHoxZN/cTUCw # pphVrAEwuWx48YR9x8xorsgoMRmwIkXdlTSuvLmq6y9ypq8OjoWILZuwN48ILZZT # MqoKNQwbQJr/0L6Tg7csQayJ2L2fJgQDcVOA8lnjlAwRlRI+eMWUz181iGwwKDM9 # rvzntqrVx1d0H4I598vgv597GAn8wo3r7DK5lMt+M5zy5sJY1SgtJU6/PGNrtPKO # GwLG1jaNjBHl0+YnEgvQp0Fw2bDXftxvZIjTiySHJ69xcC9oyUKtaDvJWUk4Ft8D # USAXvWC1qKHPMACPUGRWCw== # =g6lD # -----END PGP SIGNATURE----- # gpg: Signature made Fri 14 Mar 2025 09:15:49 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250314-1' of https://git.linaro.org/people/pmaydell/qemu-arm: meson.build: Set RUST_BACKTRACE for all tests target/arm: Simplify pstate_sm check in sve_access_check target/arm: Make DisasContext.{fp, sve}_access_checked tristate util/cacheflush: Make first DSB unconditional on aarch64 Revert "hw/char/pl011: Warn when using disabled receiver" tests/functional: Bump up arm_replay timeout MAINTAINERS: Fix status for Arm boards I "maintain" target/arm: Forbid return to AArch32 when CPU is AArch64-only target/arm: Add cpu local variable to exception_return helper target/arm: HCR_EL2.RW should be RAO/WI if EL1 doesn't support AArch32 target/arm: SCR_EL3.RW should be treated as 1 if EL2 doesn't support AArch32 target/arm: Move arm_current_el() and arm_el_is_aa64() to internals.h target/arm: Move arm_cpu_data_is_big_endian() etc to internals.h linux-user/arm: Remove unused get_put_user macros linux-user/aarch64: Remove unused get/put_user macros target/arm: Un-inline access_secure_reg() target/arm: Move A32_BANKED_REG_{GET,SET} macros to cpregs.h Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'subprojects/arbitrary-int-1-rs.wrap')
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