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authorPeter Maydell <peter.maydell@linaro.org>2023-03-09 10:22:49 +0000
committerPeter Maydell <peter.maydell@linaro.org>2023-03-09 10:22:50 +0000
commit555ce1d8559ec00037f994c3a5df07815d20e1ef (patch)
tree2fb33ab4165c92449a2dcb64b295e7df7f03876c /softmmu
parent7b0f0aa55fd292fa3489755a3a896e496c51ea86 (diff)
parentcb9291e550c58825d6d7a6c9dc877705bd635376 (diff)
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Merge tag 'mips-misc-20230308' of https://github.com/philmd/qemu into staging
MIPS (and few misc) patches - MIPS - Remove obsolete "mips" board from target-mips.rst - Fix JALS32/J32/SWM32 instructions for microMIPS - Fix CP0.Config7.WII handling on pre-R6 cores - HW - Revert "Remove intermediate IRQ forwarder" commits - Implement legacy LTIM Edge/Level Bank Select in Intel 8259 INTC - Improve PCI IRQ routing in VT82C686 / Pegasos II - Basic implementation of VIA AC97 audio playback - Implement 'resume on connection status change' in USB OHCI - UI - Override windowDidResignKey - memory - Dump HPA and access type in HMP 'info ramblock' # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmQHzH8ACgkQ4+MsLN6t # wN4RbxAAtbsbJKHikHevCiE9Fi0E4HHI4su00m3anImogfU3CKIHA7WHgeUVCdVH # aLoFKjvE3d45FA4YwMs13wIo89tv6btn1y8C9iy+yjktdABPUr8OJphuaDxU+yNf # XhPm4WsS0tEg5KzzTHF7qotJGw7Zd0Aca8oezFVBSL8b73lqiJiWBEouFTK9j5Oi # s1uvAOPG3oxSlT7IIbnLRIEff4hi5FZh+LxRDgE3ChcOyY2W/DhrpdVIazv9Cpki # facQ0ozMG4uuZ+HvviuTkK1vLX1+BcS0P1fnDPkXEPAxqx9jdqsMqWHbbnseQPN3 # xcVhw+GOZ67x8qAWIBKDG7nfChbcXgJ2sHxQmvb2XlxnOYw1oO5aRlrnn7ZPEWYA # NbqUHB8G88wDcrms+Y+xCfO8idnr7Kzf4/1R1J1+5yEjg8Y1wu4t0asqZvhXA2HL # F1yhHDCRY8w9pLYmPFGBrINBCoosiDn61g+JTngPffq1zJttmWjSLe9BYOF8Kiw+ # 4YjkCx43wK6RLTZNhU8g7iuqoYbHCQcXx5ZnGEadk+UJcfGrLnOrQbtAhvysS2wo # msyum0FNWhnx/IZ6bmhmbFC8F/hASgyiV9CDwU2oOZ2oAkRiFXYBfXruUAt+6uLT # UnAihAEsyUjyg5YNb4r8ZNkdeCPN6p3s2xY8OHphqu717K6uJXw= # =D/0W # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Mar 2023 23:45:03 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'mips-misc-20230308' of https://github.com/philmd/qemu: log: Remove unneeded new line memory: Dump HPA and access type of ramblocks ui/cocoa: Override windowDidResignKey hw/usb/ohci: Implement resume on connection status change hw/audio/via-ac97: Basic implementation of audio playback hw/usb/vt82c686-uhci-pci: Use PCI IRQ routing hw/ppc/pegasos2: Fix PCI interrupt routing hw/isa/vt82c686: Implement PCI IRQ routing hw/intc/i8259: Implement legacy LTIM Edge/Level Bank Select hw/display/sm501: Add debug property to control pixman usage Revert "hw/isa/vt82c686: Remove intermediate IRQ forwarder" Revert "hw/isa/i82378: Remove intermediate IRQ forwarder" hw/mips/itu: Pass SAAR using QOM link property hw/mips: Declare all length properties as unsigned target/mips: Set correct CP0.Config[4, 5] values for M14K(c) target/mips: Implement CP0.Config7.WII bit support target/mips: Fix SWM32 handling for microMIPS target/mips: Fix JALS32/J32 instruction handling for microMIPS target/mips: Replace [g_]assert(0) -> g_assert_not_reached() docs/system: Remove "mips" board from target-mips.rst Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'softmmu')
-rw-r--r--softmmu/physmem.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index a6efd8e..fb412a5 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -1126,15 +1126,21 @@ GString *ram_block_format(void)
GString *buf = g_string_new("");
RCU_READ_LOCK_GUARD();
- g_string_append_printf(buf, "%24s %8s %18s %18s %18s\n",
- "Block Name", "PSize", "Offset", "Used", "Total");
+ g_string_append_printf(buf, "%24s %8s %18s %18s %18s %18s %3s\n",
+ "Block Name", "PSize", "Offset", "Used", "Total",
+ "HVA", "RO");
+
RAMBLOCK_FOREACH(block) {
psize = size_to_str(block->page_size);
g_string_append_printf(buf, "%24s %8s 0x%016" PRIx64 " 0x%016" PRIx64
- " 0x%016" PRIx64 "\n", block->idstr, psize,
+ " 0x%016" PRIx64 " 0x%016" PRIx64 " %3s\n",
+ block->idstr, psize,
(uint64_t)block->offset,
(uint64_t)block->used_length,
- (uint64_t)block->max_length);
+ (uint64_t)block->max_length,
+ (uint64_t)(uintptr_t)block->host,
+ block->mr->readonly ? "ro" : "rw");
+
g_free(psize);
}