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authorHavard Skinnemoen <hskinnemoen@google.com>2020-09-10 22:20:51 -0700
committerPeter Maydell <peter.maydell@linaro.org>2020-09-14 14:24:58 +0100
commit2d8f048c25ab2b701ea8e14ba5b02d3a8a5c9044 (patch)
tree4294e514fa0587c228a798f886e95e981f108074 /softmmu/ioport.c
parent85fdd74ff074bf59644131cea9e2ae1f2a8d5fd1 (diff)
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hw/arm: Add NPCM730 and NPCM750 SoC models
The Nuvoton NPCM7xx SoC family are used to implement Baseboard Management Controllers in servers. While the family includes four SoCs, this patch implements limited support for two of them: NPCM730 (targeted for Data Center applications) and NPCM750 (targeted for Enterprise applications). This patch includes little more than the bare minimum needed to boot a Linux kernel built with NPCM7xx support in direct-kernel mode: - Two Cortex-A9 CPU cores with built-in periperhals. - Global Configuration Registers. - Clock Management. - 3 Timer Modules with 5 timers each. - 4 serial ports. The chips themselves have a lot more features, some of which will be added to the model at a later stage. Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Alexander Bulekov <alxndr@bu.edu> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200911052101.2602693-5-hskinnemoen@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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