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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-05-10 20:08:39 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-05-25 16:01:43 +0100 |
| commit | b6889c5ae3895cf5a4322adb32b2133e9b91d158 (patch) | |
| tree | 805365fadaeaade349c681f09aedca38cb36bcff /scsi | |
| parent | 382c7160d1cd9e815fb94d3889a5ddcf0e1845ab (diff) | |
| download | qemu-b6889c5ae3895cf5a4322adb32b2133e9b91d158.zip qemu-b6889c5ae3895cf5a4322adb32b2133e9b91d158.tar.gz qemu-b6889c5ae3895cf5a4322adb32b2133e9b91d158.tar.bz2 | |
hw/arm/mps2-tz: Don't duplicate modelling of SRAM in AN524
The SRAM at 0x2000_0000 is part of the SSE-200 itself, and we model
it that way in hw/arm/armsse.c (along with the associated MPCs). We
incorrectly also added an entry to the RAMInfo array for the AN524 in
hw/arm/mps2-tz.c, which was pointless because the CPU would never see
it. Delete it.
The bug had no guest-visible effect because devices in the SSE-200
take priority over those in the board model (armsse.c maps
s->board_memory at priority -2).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210510190844.17799-2-peter.maydell@linaro.org
Diffstat (limited to 'scsi')
0 files changed, 0 insertions, 0 deletions