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| author | Roman Bolshakov <r.bolshakov@yadro.com> | 2018-10-18 16:44:01 +0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2018-10-19 13:44:12 +0200 |
| commit | b4e1af8961bf9b0d415abdf3e4908168daea6059 (patch) | |
| tree | 1626da7b6b3fc871b8c23bf6bc6f3b44466bfa77 /scripts | |
| parent | 6b7a98303b53b0cd94c2755b1f5c0734bbaa5347 (diff) | |
| download | qemu-b4e1af8961bf9b0d415abdf3e4908168daea6059.zip qemu-b4e1af8961bf9b0d415abdf3e4908168daea6059.tar.gz qemu-b4e1af8961bf9b0d415abdf3e4908168daea6059.tar.bz2 | |
i386: hvf: Fix register refs if REX is present
According to Intel(R)64 and IA-32 Architectures Software Developer's
Manual, the following one-byte registers should be fetched when REX
prefix is present (sorted by reg encoding index):
AL, CL, DL, BL, SPL, BPL, SIL, DIL, R8L - R15L
The first 8 are fetched if REX.R is zero, the last 8 if non-zero.
The following registers should be fetched for instructions without REX
prefix (also sorted by reg encoding index):
AL, CL, DL, BL, AH, CH, DH, BH
Current emulation code doesn't handle accesses to SPL, BPL, SIL, DIL
when REX is present, thefore an instruction 40883e "mov %dil,(%rsi)" is
decoded as "mov %bh,(%rsi)".
That caused an infinite loop in vp_reset:
https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03293.html
Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com>
Message-Id: <20181018134401.44471-1-r.bolshakov@yadro.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions