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| author | Jamin Lin <jamin_lin@aspeedtech.com> | 2024-12-04 16:44:50 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2024-12-11 07:25:53 +0100 |
| commit | 6a0238a4731eaf26ec28f2f7b1d624375135f00c (patch) | |
| tree | 9a6df918920829bb52682512570e27308bc8a6ac /scripts | |
| parent | 0178d1198fa225c8ecce7ae52dee5854c2d13213 (diff) | |
| download | qemu-6a0238a4731eaf26ec28f2f7b1d624375135f00c.zip qemu-6a0238a4731eaf26ec28f2f7b1d624375135f00c.tar.gz qemu-6a0238a4731eaf26ec28f2f7b1d624375135f00c.tar.bz2 | |
hw:sdhci: Introduce a new "capareg" class member to set the different Capability Registers
Currently, it set the hardcode value of capability registers to all ASPEED SOCs
However, the value of capability registers should be different for all ASPEED
SOCs. For example: the bit 28 of the Capability Register 1 should be 1 for
64-bits System Bus support for AST2700.
Introduce a new "capareg" class member whose data type is uint_64 to set the
different Capability Registers to all ASPEED SOCs.
The value of Capability Register is "0x0000000001e80080" for AST2400 and
AST2500. The value of Capability Register is "0x0000000701f80080" for AST2600.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241204084453.610660-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions