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| author | Mayuresh Chitale <mchitale@ventanamicro.com> | 2023-10-19 12:26:44 +0530 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-11-07 11:06:02 +1000 |
| commit | 4bf501dc0118a28699e28c01acb34e28ddeb0acc (patch) | |
| tree | e202e71dfd7cfa5e73efcc35fffc6420acf2932a /scripts | |
| parent | 095fe72a128b34d4f9317c2798c6fa7762a9e3e6 (diff) | |
| download | qemu-4bf501dc0118a28699e28c01acb34e28ddeb0acc.zip qemu-4bf501dc0118a28699e28c01acb34e28ddeb0acc.tar.gz qemu-4bf501dc0118a28699e28c01acb34e28ddeb0acc.tar.bz2 | |
target/riscv: pmp: Clear pmp/smepmp bits on reset
As per the Priv and Smepmp specifications, certain bits such as the 'L'
bit of pmp entries and mseccfg.MML can only be cleared upon reset and it
is necessary to do so to allow 'M' mode firmware to correctly reinitialize
the pmp/smpemp state across reboots. As required by the spec, also clear
the 'A' field of pmp entries.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20231019065644.1431798-1-mchitale@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions